Programmable Logic Circuit State Retention During Power Gating
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Solution Overview
Problem
Programmable logic devices face issues with memory element deterioration due to repeated rewriting of configuration data and the inability to maintain connection states without power supply voltage.
Innovation Solution
A programmable logic device incorporating a transistor with a channel formation region in an oxide semiconductor layer, a configuration changing circuit, a power supply control circuit, and a state memory circuit to manage configuration data and power supply, allowing for the retention of logic states even without power supply voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric material is used in a memory element to hold configuration data, then the connection state can be kept without power supply voltage, but the number of rewriting times is limited and memory element deterioration occurs
Solution Approach 1:
The patent divides the memory function into two separate components: a ferroelectric memory element for retaining connection states without power, and a separate configuration data storage system. This segmentation allows the ferroelectric material to be used only for state retention without repeated rewriting, thereby extending its operational lifespan while maintaining reliability.
Solution Approach 2:
The patent implements a configuration data storage system that prepares and stores configuration data in advance in a non-volatile memory. When power is restored, the system automatically retrieves and applies the stored configuration data without requiring rewriting of the ferroelectric memory element, thus preventing deterioration while maintaining state retention capability.
2Adaptability or versatility
If configuration data is repeatedly rewritten to change logic circuit states, then adaptability is improved, but memory element deterioration accelerates
Solution Approach 1:
The patent creates a copy mechanism where configuration data is stored in a non-volatile memory as a master copy. When reconfiguration is needed, the system reads from this master copy and updates the ferroelectric memory element only with the necessary state information, rather than repeatedly rewriting the entire configuration data. This reduces the number of write operations to the ferroelectric material, extending its durability while maintaining full reconfigurability.
Solution Approach 2:
The patent changes the operational parameters of the memory system by using different memory technologies for different functions: non-volatile memory for configuration data storage (read-heavy) and ferroelectric memory for state retention (write-light). This parameter change optimizes the system for both adaptability and memory element durability by matching each memory type to its最适合的操作模式.
3Speed
If power supply voltage is continuously supplied to maintain logic states, then processing speed is maintained, but power consumption increases
Solution Approach 1:
The patent implements a periodic power management strategy where power supply voltage is selectively applied only to the arithmetic circuits that currently require processing. The power supply control circuit periodically monitors and identifies active circuits, supplying power only when needed. This periodic action maintains processing speed for active circuits while significantly reducing overall power consumption by keeping inactive circuits in a low-power state.
Solution Approach 2:
The patent implements a self-service power management system where each arithmetic circuit includes internal control logic that automatically detects its own operational state and manages its power supply accordingly. When a circuit completes its processing task, it automatically signals the power supply control circuit to reduce or stop power supply to that specific circuit. This self-service mechanism maintains processing speed when needed while minimizing power consumption during idle periods without requiring constant external control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces memory element deterioration, improves processing speed, and decreases power consumption during power supply voltage switching.
Implementation Method 1
A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits. The configuration data is held in the gate of the switch transistor while supply of power supply voltage from the power supply control circuit is stopped.
Data Source
AI summary
An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.


