Logic Synthesis Register Sharing for IC Die Area Reduction
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Solution Overview
Problem
Integrated circuit (IC) devices often include unnecessary peripheral modules that waste die area and contribute to leakage power due to supporting multiple peripheral capabilities, with the cost of redesigning these modules being high when provided by external vendors.
Innovation Solution
A method and apparatus for logic synthesis that identifies mutually exclusive modules within an IC design, selects register elements with analogous clock signal requirements, and merges these modules to share common register elements, reducing the number of required register elements and thereby minimizing die area and leakage power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If peripheral modules are designed to support multiple peripheral capabilities, then adaptability is improved, but device complexity and die area increase
Solution Approach 1:
The patent applies multi-functionality by designing a single peripheral module that can support multiple peripheral capabilities through configurable register elements. The module can be reconfigured to support different peripheral functions by selecting different register element configurations, eliminating the need for separate dedicated modules for each peripheral capability.
Solution Approach 2:
The patent merges multiple peripheral modules into a single integrated module by sharing common register elements. Instead of having separate modules for different peripheral capabilities, the invention combines them into one module that shares register resources, thereby reducing overall device complexity and die area while maintaining support for multiple peripheral functions.
2Adaptability or versatility
If separate peripheral modules are provided for each capability, then functional completeness is improved, but die area and leakage power increase
Solution Approach 1:
The patent merges multiple peripheral modules into a single integrated module that shares common register elements. This consolidation reduces the total number of register elements required, thereby reducing die area while maintaining the ability to support multiple peripheral capabilities through configuration.
Solution Approach 2:
The patent discards redundant register elements that would be required if separate modules were used for each peripheral capability. By identifying and eliminating these redundant elements through shared register usage, the invention recovers die area that would otherwise be wasted, while still providing complete peripheral capability support through configurable shared registers.
3Adaptability or versatility
If separate peripheral modules are provided for each capability, then functional completeness is improved, but leakage power increases
Solution Approach 1:
The patent merges multiple peripheral modules into a single integrated module that shares common register elements. This reduces the total number of register elements that require power supply and clocking, thereby reducing leakage power while maintaining support for multiple peripheral capabilities through configuration of the shared registers.
Solution Approach 2:
The patent discards redundant register elements that would be required if separate modules were used for each peripheral capability. By eliminating these redundant elements through shared register usage, the invention recovers leakage power that would otherwise be continuously consumed by unused register elements in separate modules.
4Adaptability or versatility
If peripheral modules are redesigned to support multiple capabilities, then adaptability is improved, but manufacturing cost increases
Solution Approach 1:
The patent applies multi-functionality by designing a single peripheral module that can support multiple peripheral capabilities through configurable register elements. This approach eliminates the need for expensive redesigns of separate modules, as the same register-based architecture can be reconfigured to support different peripheral functions without requiring complete module redesigns.
Solution Approach 2:
The patent uses parameter changes in the register element configuration to adapt the peripheral module to different capabilities. Instead of redesigning the entire module structure, the invention changes configuration parameters of the register elements to support different peripheral functions, thereby reducing redesign costs while maintaining adaptability.
Data Source
AI summary
A method of performing logic synthesis of at least a part of an integrated circuit design. The method comprises identifying a first and at least one further module within the IC design that are mutually exclusive, selecting at least one register element within the first identified module and at least one register element within the at least one further identified module to be shared, and merging the first and at least one further mutually exclusive modules such that at least one common register element is shared between the first and at least one further mutually exclusive modules for the register elements selected to be shared.