Logical Address Translation Using Key Range Offset Tables
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face inefficiencies in logical address translation, particularly when handling encrypted data across different encryption key ranges, leading to suboptimal data writing and reading processes due to the need to skip physical sectors, which complicates the translation of logical block addresses to physical locations.
Innovation Solution
The implementation of a key range table that tracks offsets for physical locations skipped during data writing across different encryption key ranges, allowing for accurate translation of logical block addresses to physical locations by summing cumulative offsets for each encryption key, enabling efficient data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written across different encryption key ranges, then data security is improved, but the complexity of address translation increases due to needing to track and sum cumulative offsets for each key range
Solution Approach 1:
The patent introduces an intermediary data structure (the array storing cumulative offset values for each encryption key range) that mediates between the logical address space and physical address space. This intermediary structure automates the complex calculation of physical addresses when data spans multiple encryption key ranges, resolving the contradiction by embedding the translation logic within the address translation mechanism itself rather than requiring external complex processing
Solution Approach 2:
The patent performs preliminary action by pre-calculating and storing cumulative offset values for each encryption key range in an array before address translation is needed. This allows the system to quickly retrieve and apply the appropriate offsets during address translation without performing complex calculations in real-time, thereby reducing the perceived complexity while maintaining security across key ranges
2Reliability
If physical sectors are skipped during data writing to accommodate encryption key ranges, then data security is improved, but data writing efficiency deteriorates due to increased translation overhead
Solution Approach 1:
The address translation mechanism serves itself by using the same cumulative offset array for both reading and writing operations. The system automatically determines the appropriate offset based on which encryption key range the logical address falls into, eliminating the need for external intervention or complex external translation logic, thereby maintaining efficiency while ensuring security
Solution Approach 2:
The patent changes the parameter representation by using cumulative offset values indexed by encryption key range instead of calculating offsets dynamically during each write operation. This parameter transformation allows the system to efficiently handle skipped physical sectors by simply adding pre-computed offset values to logical addresses, maintaining writing efficiency while accommodating security requirements
Data Source
Figure 1
Figure 2~3
AI summary
The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes receiving a command associated with a LA, wherein the LA is in a particular range of LAs and translating the LA to a physical location in memory using an offset corresponding to a number of physical locations skipped when writing data associated with a range of LAs other than the particular range.