Logical Block Address Buffering for Parallel Memory Reads
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Solution Overview
Problem
Current database systems face limitations in processing speed due to hardware constraints, data storage methods, and restricted co-processing options, which hinder efficient data processing and query execution.
Innovation Solution
A parallelized database system architecture that utilizes multiple computing devices and processing core resources to parallelize data input, storage, retrieval, and query processing, employing a database operating system to manage memory allocation and optimize query execution through techniques like Single Producer Single Consumer buffers and tagged read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is stored in non-volatile memory devices, then data persistence and storage capacity are improved, but processing speed and query execution time deteriorate due to hardware constraints and memory response order variability
Solution Approach 1:
The patent divides the database system into multiple computing devices (first computing device, second computing device, etc.) that can operate in parallel. Each device can handle different data operations independently, allowing simultaneous data input, storage, and retrieval across multiple hardware units, thereby overcoming the speed limitations of individual non-volatile memory devices.
Solution Approach 2:
The patent introduces a buffer memory system that acts as an intermediary between the non-volatile memory devices and the processing units. This buffer memory temporarily stores data and manages the transfer between fast volatile memory and slower non-volatile storage, decoupling the processing speed from memory response time and maintaining data persistence without sacrificing processing throughput.
2Reliability
If traditional database systems use sequential processing, then data integrity is maintained, but query execution time and processing duration increase
Solution Approach 1:
The patent implements parallel query processing by dividing queries into multiple operations that can be executed simultaneously across different computing devices. Each device processes a portion of the data independently, and results are aggregated to maintain overall data integrity while dramatically reducing total query execution time compared to sequential processing.
Solution Approach 2:
The patent changes the processing mode from sequential to parallel by modifying system parameters such as thread configuration, memory allocation, and data distribution strategies. This parameter change enables multiple processing operations to occur simultaneously while maintaining data integrity through coordinated access control and consistent state management across the distributed system.
3Productivity
If multiple computing devices are used for parallel processing, then processing throughput and productivity are improved, but system complexity and device architecture complexity increase
Solution Approach 1:
The patent designs a universal database system architecture where multiple computing devices follow the same standardized interface and communication protocols. Each device can perform multiple functions (data storage, processing, retrieval) and can be dynamically allocated to different tasks, simplifying the overall system management despite the increased number of components.
Solution Approach 2:
The patent implements feedback mechanisms where computing devices report their status, processing progress, and data state to a central coordinator or through peer-to-peer communication. This feedback enables dynamic load balancing, error detection, and coordination, allowing the complex parallel system to self-regulate and maintain efficiency without requiring overly complex external control.
4Speed
If non-volatile memory response order is not maintained, then processing speed is improved, but data consistency and reliability deteriorate
Solution Approach 1:
The patent uses buffer memory and logging mechanisms as intermediaries to handle non-volatile memory response order variability. The buffer memory absorbs out-of-order responses and reorders data before presenting it to processing units, while logging mechanisms track write operations to ensure eventual consistency. This allows the system to exploit the speed of non-volatile memory without sacrificing data consistency.
Solution Approach 2:
The patent implements ahead-of-time cushioning through write-ahead logging and checkpointing mechanisms. Before committing data to non-volatile memory, the system records operations in a log and creates checkpoints that can be used for recovery. This cushioning approach allows the system to tolerate out-of-order memory responses and maintain data consistency even when memory access order varies.
Data Source
AI summary
A method includes identifying, by a processing entity of a computing device, data units to read from non-volatile memory and to write into ordered buffers of volatile memory. The method further includes generating, by the processing entity, read operations regarding the data units, wherein the number of read operations equals “n”. The method further includes tagging, by the processing entity, each read operation of the read operations with a unique ordered tag value. The method further includes receiving, by the processing entity, read responses to the read operations from the non-volatile memory. The method further includes writing, by the processing entity, data units contained in the read responses into the ordered buffers in accordance with the ordered tag values. The method further includes tracking, by the processing entity, consumption of the data units from the ordered buffers.