Logical Code Mapping for Low-Noise Parallel Data Transmission

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Solution Overview

Problem

High-speed interface designs face noise issues due to simultaneous switching in computing systems, which can lead to power supply and ground noise, affecting data transmission integrity and increasing power consumption.

Innovation Solution

The implementation of algorithms that map data words from one code space to another with an even or nearly even number of logical zeros and ones, reducing the number of transitions during data transmission by using techniques such as bit inversion and encoding schemes that minimize Hamming weight changes, thereby reducing noise generated by Simultaneously Switching Outputs (SSO).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is transmitted using parallel interfaces with multiple bits simultaneously, then data transmission speed is improved, but noise is generated due to simultaneous switching of output circuits

Engineering Contradiction:
Improvedata transmission speedVSAvoidnoise from simultaneous switching
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies parameter changes by modifying the encoding of data words to control the number of logical transitions. By mapping data words to code words with specific Hamming weights (number of logical ones), the patent changes the switching behavior of output circuits. This is achieved through algorithms that select code words from a code space where the Hamming weight is constrained, thereby reducing simultaneous switching noise while maintaining parallel transmission speed.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If encoding schemes are used to reduce transitions between logic states, then noise is reduced, but device complexity increases due to mapping algorithms

Engineering Contradiction:
Improveswitching noiseVSAvoidencoding/decoding complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-computing and storing mapping tables that directly associate data words with appropriate code words having desired Hamming weights. Instead of performing complex real-time calculations, the encoding is reduced to a table lookup operation. The mapping tables are generated offline using algorithms that ensure the code words have the required properties (even or nearly even number of logical zeros and ones), thereby reducing noise while minimizing the complexity of the actual encoding device.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If the number of logical transitions is minimized, then power consumption is reduced, but data transmission reliability may be affected

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies parameter changes by carefully selecting code words with specific Hamming weight properties that balance power consumption and reliability. By choosing code words with even or nearly even numbers of logical zeros and ones, the patent minimizes transitions (reducing power consumption) while maintaining sufficient signal transitions for reliable clock and data recovery. The mapping algorithms ensure that the code space is chosen to provide both low switching activity and adequate signal integrity for reliable transmission.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9966970B2Efficient silent code assignment to a set of logical codes
Publication Date: 2018.05.08 ORACLE INT CORP
  • US9966970B2 patent drawing
  • US9966970B2 patent drawing
  • US9966970B2 patent drawing

AI summary

A method for determining a mapping between two code spaces is disclosed. The method may include receiving first and second plurality of data words. The least-significant-bits (LSBs) of a first data word of a first subset of the first plurality of data words may be compared to the LSBs of each data word of a second subset of the second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.