Logical Device Interface for Multi-Accelerator Workload Distribution

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Solution Overview

Problem

In multi-processing environments, existing technologies face challenges in efficiently managing workloads across multiple accelerators, leading to inefficiencies due to back-and-forth data transfer and limitations in scalability, particularly in 5G technology deployments where physical layer functional blocks are processed by CPUs and offloaded to hardware accelerators.

Innovation Solution

An inline acceleration approach is implemented using a device-agnostic API that allows CPUs to enqueue and dequeue workloads directly on hardware accelerators, eliminating the need for back-and-forth data transfer and enabling efficient utilization of multiple acceleration resources through a unified interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple processors are used to achieve additional computations, then processing power is increased, but system complexity increases significantly

Engineering Contradiction:
Improveprocessing powerVSAvoidsystem complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The system segments processing tasks into distinct workload queues, with each queue dedicated to specific accelerator types. This segmentation allows multiple processors to operate independently on different task segments, increasing processing power while managing complexity through organized task distribution

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A driver assembly acts as an intermediary layer between the application and multiple accelerators. This mediator handles the complexity of multi-processor coordination, task distribution, and data management, allowing applications to utilize multiple processors without directly managing the associated complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If workloads are distributed across multiple accelerators, then processing efficiency is improved, but data transfer overhead increases due to back-and-forth communication

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiddata transfer time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The driver assembly merges multiple accelerator-specific drivers into a unified interface that manages workloads across all accelerators. This consolidation eliminates redundant data transfer operations by providing a single coordination point that optimizes data flow between accelerators and the application

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system enables continuous processing by maintaining persistent workload queues and direct accelerator access. Workloads remain in queues awaiting processing without requiring repeated data transfer cycles, allowing accelerators to operate continuously on their assigned tasks without interruption

Inventive Principle:
Principle #20Continuity of useful action

3Ease of operation

If a unified interface is provided for multiple accelerators, then ease of operation is improved, but device complexity increases

Engineering Contradiction:
Improveinterface simplicityVSAvoiddriver assembly complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The driver assembly serves as an intermediary that presents a simplified unified interface to applications while managing the underlying complexity of multiple accelerators. The intermediary handles accelerator-specific protocols, task distribution, and resource management, shielding applications from complexity while maintaining ease of operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The driver assembly implements a universal interface that can manage multiple types of accelerators through a single standardized API. This multi-functional design allows the same interface to work with different accelerator architectures, simplifying operation while the internal structure manages the inherent complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20220276914A1Interface for multiple processors
Publication Date: 2022.09.01 NVIDIA CORP
  • US20220276914A1 patent drawing
  • US20220276914A1 patent drawing
  • US20220276914A1 patent drawing

AI summary

Apparatuses, systems, and techniques to interface with an accelerator. In at least one embodiment, an application provides workloads to a logical device, and the logical device distributes the workloads across a plurality of accelerators.