Logical Integrated Circuit for Streaming Image Semantic Segmentation
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Solution Overview
Problem
Existing image semantic segmentation technologies rely on software programming, resulting in slow processing speeds for image semantic segmentation tasks.
Innovation Solution
Implementing an image semantic segmentation method using a logical integrated circuit with convolution and deconvolution processing modules, which perform operations to generate feature data and classify image blocks into semantic categories, thereby achieving semantic segmentation through a hardware circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If image semantic segmentation is implemented through software programming, then flexibility and ease of implementation are maintained, but processing speed is slow
Solution Approach 1:
The patent replaces the software-based image semantic segmentation system with a hardware-based logical integrated circuit system. The convolution processing module and deconvolution processing module are implemented as hardware circuits that perform parallel computations, substituting the sequential software processing mechanism. This hardware substitution enables significant speed improvement while maintaining the semantic segmentation functionality through dedicated circuit designs for convolution and deconvolution operations.
2Productivity
If hardware circuits are used for image semantic segmentation, then processing speed increases, but device complexity increases
Solution Approach 1:
The patent divides the image semantic segmentation task into distinct functional modules: a convolution processing module for feature extraction and a deconvolution processing module for feature restoration and classification. Each module is implemented as a separate hardware circuit with dedicated functionality. This segmentation allows parallel processing of different image regions and features, improving productivity while managing circuit complexity through modular design and clear functional separation.
3Measurement precision
If multiple convolution layers are increased to reduce feature data, then processing accuracy improves, but processing time increases
Solution Approach 1:
The patent implements a continuous processing pipeline where the convolution processing module and deconvolution processing module operate in sequence without interruption. The convolution module continuously extracts features from input images, and the deconvolution module immediately processes these features for classification and image block restoration. This continuous action eliminates idle time between processing stages, allowing multiple convolution layers to be applied without additional processing delays, thus maintaining accuracy while minimizing time loss.
Data Source
AI summary
Disclosed are an image semantic segmentation method, a logical integrated circuit, a system and an electronic device. The logical integrated circuit includes a convolution processing module and a deconvolution processing module. The convolution processing module performs convolution operation processing on an image to generate a piece of feature data of each and every feature image block of the image. The deconvolution processing module is configured to perform deconvolution operation processing on each piece of feature data to obtain an respective image block region; determine an approximation degree of the each piece of feature data and each and every preset semantic category of multiple preset semantic categories, and classify the each piece of feature data into a preset semantic category; and fill each image block region corresponding to the each piece of feature data with a filling color to achieve semantic segmentation of the image.