Logical Memory Address Regions for Diverse Memory Technologies

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current memory devices manage memory address ranges uniformly, failing to accommodate diverse memory technologies with different internal partitions and properties, leading to inefficient performance and energy consumption.

Innovation Solution

The system divides physical memory address spaces into multiple logical memory address regions with non-overlapping, contiguous address ranges, allowing dynamic management and optimization of access patterns, permissions, and properties for each region, supporting various memory technologies and applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If memory devices manage memory address ranges uniformly, then device complexity is reduced and ease of operation is improved, but adaptability to diverse memory technologies with different internal partitions and properties deteriorates

Engineering Contradiction:

Improveadaptability to diverse memory technologiesVSAvoidmemory management complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the physical memory address space into multiple logical memory address regions, each of which can be independently configured and managed. This segmentation allows different regions to be mapped to different memory devices with different technologies and properties, enabling the system to accommodate diverse memory technologies while maintaining uniform management at the higher level.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each logical memory address region can have its own specific properties and configurations tailored to the underlying memory device technology. This local quality approach allows each region to be optimized for its specific memory device characteristics (such as row buffer size, bank count, etc.) while the overall system maintains a unified address space management structure.

Inventive Principle:

Principle #3Local quality

2Productivity

If a single contiguous physical address space is used, then address management is simplified, but the ability to optimize access patterns and properties for different applications deteriorates

Engineering Contradiction:

Improvememory access efficiencyVSAvoidaddress space management

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The physical address space is segmented into logical regions that can be independently optimized for different applications and memory devices. This segmentation enables tailored access patterns and properties for each region without complicating the overall address space management, as the segmentation is transparent to applications.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The mapping between logical memory address regions and physical memory devices can be dynamically configured and adjusted based on application requirements and memory device availability. This dynamic capability allows the system to optimize memory access efficiency for different workloads while maintaining a consistent address space interface.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If memory devices with different physical properties are supported, then adaptability is improved, but the uniformity of memory management and access patterns deteriorates

Engineering Contradiction:

Improvesupport for diverse memory technologiesVSAvoiduniformity of memory management

Core Design Contradiction:

Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

By segmenting the address space into logical regions, the patent enables different regions to interface with different memory device types while presenting a uniform memory management interface to applications. Each logical region can be configured with properties specific to its underlying device, maintaining adaptability while preserving management uniformity at the system level.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10255191B2Logical memory address regions

Publication Date: 2019.04.09 ADVANCED MICRO DEVICES INC

AI summary

Systems, apparatuses, and methods for implementing logical memory address regions in a computing system. The physical memory address space of a computing system may be partitioned into a plurality of logical memory address regions. Each logical memory address region may be dynamically configured at run-time to meet changing application needs of the system. Each logical memory address region may also be configured separately from the other logical memory address regions. Each logical memory address region may have associated parameters that identify region start address, region size, cell-level mode, physical-to-device mapping scheme, address masks, access permissions, wear-leveling data, encryption settings, and compression settings. These parameters may be stored in a table which may be used when processing memory access requests.