Logical Memory Space Segmentation for Address Translation

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Solution Overview

Problem

Conventional data storage devices experience delays and performance degradation due to the need for sequential searching of multiple link tables in random access memory to convert logical addresses to physical addresses, leading to prolonged data access times.

Innovation Solution

The logical memory space is divided into logical address ranges and sets, with dedicated storage units in random access memory storing link tables for each range, allowing direct determination of the target link table and reducing the need for extensive searching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If link tables are stored in random access memory for address conversion, then data access speed is improved, but memory capacity is consumed and sequential searching causes delays

Engineering Contradiction:
Improvedata access speedVSAvoidaddress conversion delay
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent divides the logical memory space into multiple logical address ranges, with each range further divided into logical address sets. Link tables are segmented and stored in dedicated storage units corresponding to specific address ranges. This segmentation allows the controller to directly determine which storage unit contains the required link table based on the target logical address, eliminating sequential searching through all link tables and reducing address conversion delay.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple link tables are loaded into random access memory, then address conversion capability is improved, but memory capacity is limited and loading time increases

Engineering Contradiction:
Improveaddress conversion capabilityVSAvoidmemory capacity
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent segments the link tables into multiple groups, with each group corresponding to a specific logical address range. Each storage unit in the random access memory is dedicated to storing link tables for a particular address range. This segmentation allows the system to load only the relevant link tables for currently accessed address ranges, reducing the total memory capacity required while maintaining comprehensive address conversion capability across the entire logical memory space.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8316210B2Dividing a logical memory space into ranges and sets for address translation
Publication Date: 2012.11.20 SILICON MOTION INC
  • US8316210B2 patent drawing
  • US8316210B2 patent drawing
  • US8316210B2 patent drawing

AI summary

The invention provides a data storage device. In one embodiment, the data storage device comprises a storage medium, a random access memory, and a controller. The storage medium stores a plurality of link tables. The random access memory comprises a plurality of storage units respectively corresponding to a plurality of logical address ranges. The controller receives a target logical address from the host, determines a target link table corresponding to a logical address set comprising the target logical address, determines a target storage unit corresponding to a logical address range comprising the target logical address, determines whether the target storage unit has stored the target link table, and when the target storage unit has stored the target link table, determines a target physical address mapped to the target logical address according to a mapping relationship stored in the target link table, and accesses data stored in the storage medium according to the target physical address.