Logical to Physical Address Mapping for Non-Volatile Memory Page Segmentation
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Solution Overview
Problem
Non-volatile memory (NVM) faces conflicting requirements regarding page size, where increasing page size reduces silicon area but increases time for data modification operations, leading to inefficiencies and fragmentation in memory usage.
Innovation Solution
Implementing a mapping logic that separates each page into multiple portions, allowing flexible configuration and efficient data processing by mapping logical addresses to physical addresses, thereby reducing page size and minimizing fragmentation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If page size is increased to reduce silicon area, then memory area efficiency is improved, but data modification time increases
Solution Approach 1:
The patent divides each physical page into multiple portions (e.g., first portion and second portion), allowing selective modification of only the required portion during data updates. This segmentation enables the system to maintain larger physical page sizes for area efficiency while reducing the actual data modification time by operating on smaller sub-portions rather than the entire page.
2Area of stationary object
If page size is increased, then memory area utilization is improved, but memory fragmentation increases
Solution Approach 1:
By segmenting pages into multiple portions and allowing each portion to be independently managed and mapped to different logical address spaces, the system reduces memory fragmentation. This enables more efficient utilization of memory area while avoiding the waste associated with traditional fixed-page approaches.
Solution Approach 2:
The patent implements dynamic mapping between logical and physical addresses, where the mapping relationship can be flexibly configured and adjusted. This dynamic approach allows the system to adapt to different memory usage patterns and reduce fragmentation, improving overall memory area utilization without being constrained by fixed page boundaries.
3Device complexity
If traditional fixed-page mapping is used, then address mapping simplicity is maintained, but data modification efficiency decreases
Solution Approach 1:
The patent introduces a segmented page structure where each page is divided into multiple portions that can be independently mapped. While this increases mapping complexity compared to traditional fixed-page approaches, it dramatically improves data modification efficiency by allowing selective updates of only the necessary portions rather than requiring copying and rewriting of entire pages.
Solution Approach 2:
The patent introduces a mapping layer as an intermediary between logical addresses and physical page portions. This mapping logic translates logical addresses to specific physical page portions, enabling efficient data modification operations while managing the complexity of the segmented structure. The intermediary layer abstracts the complexity, allowing efficient data access and modification without requiring application-level awareness of the segmentation details.
Data Source
AI summary
A method for data processing including mapping between a logical address and a physical address of a memory, wherein the memory comprises several pages, wherein a group of pages comprises at least one page that comprises at least two portions, and wherein the at least two portions of each page of the group are not part of a single-page logical address space.