Logical to Physical Data Storage Mapping for Variable Length Data
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Solution Overview
Problem
Existing data storage systems face challenges in efficiently mapping logical units to physical units, particularly with variable length data, which leads to increased map size and slower host I/O operations due to the need for storing NPMU and LDATA fields in Random Access Memory (RAM).
Innovation Solution
The introduction of new mapping structures that remove the NPMU and/or LDATA fields from the map, allowing more of the map to be stored in RAM, with the controller calculating the number of physical mapping units (NPMU) on the fly during I/O operations, and employing garbage collection and deduplication mechanisms to manage storage efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the map stores NPMU and LDATA fields for variable length data, then the mapping information is complete and accurate, but the map size increases and cannot be fully cached in RAM
Solution Approach 1:
The patent extracts the NPMU and LDATA fields from the map structure, removing these fields to reduce map size. The controller then calculates these values dynamically during I/O operations, allowing the map to be stored entirely in RAM while maintaining accurate variable length data mapping.
Solution Approach 2:
The controller performs self-service by calculating the number of physical mapping units (NPMU) and logical data length (LDATA) on-the-fly during I/O operations rather than storing these values in the map. This self-calculated approach eliminates the need for additional storage fields while maintaining mapping precision.
2Adaptability or versatility
If the map size increases to accommodate variable length data mapping, then mapping completeness is improved, but host I/O operation speed decreases due to RAM cache limitations
Solution Approach 1:
By removing the NPMU and LDATA fields from the map structure, the patent reduces the map size to fit within RAM cache, thereby maintaining fast I/O operation speeds while still supporting variable length data through dynamic calculation during operations.
Solution Approach 2:
The patent changes the approach from storing static mapping parameters (NPMU, LDATA) to dynamically calculating these parameters during I/O operations. This parameter change allows the map to remain compact for RAM caching while maintaining full functionality for variable length data.
3Speed
If the map is stored entirely in RAM, then access speed is improved, but the map structure becomes more complex requiring dynamic calculation logic
Solution Approach 1:
The controller enhances its self-service capability by implementing dynamic calculation logic for NPMU and LDATA during I/O operations. This self-calculated approach allows the entire map to reside in RAM for fast access while the controller's processing logic handles the complexity of variable length data mapping.
Data Source
AI summary
Systems, methods and computer-readable memory for garbage collection in a storage device. One method comprises, upon a write of data to a first garbage collection unit (GCU) of the storage device, incrementing a number of logical mapping units stored in the first GCU along with a number of logical mapping units with valid data stored in the first GCU. A number of logical mapping units with invalid data stored in a second GCU is decremented based on the incremented number of logical mapping units with valid data stored in the first GCU. The second GCU is erased when a valid data rate of the second GCU is below a valid data rate of the first GCU.