Logical-to-Physical Mapping Structure for Memory Subsystems
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Solution Overview
Problem
Existing logical-to-physical mapping approaches in memory sub-systems become inefficient with advanced media management techniques, such as RAIN parity-based data recovery, leading to unwieldy scenarios where L2P entries cross memory blocks, requiring additional resources to track non-consecutive entries.
Innovation Solution
A multi-bit indication is used to record the offset between logical and physical addresses, allowing for different offsets based on the opening of new memory blocks, enabling the L2P data structure to be generated and managed by a controller hardware auxiliary engine.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional L2P mapping approaches are used with advanced media management techniques like RAIN parity-based data recovery, then data recovery capability is improved, but the complexity of tracking L2P entries across memory blocks increases and becomes unwieldy
Solution Approach 1:
The patent segments the L2P mapping data structure into multiple levels (first level, second level, third level) to organize and track logical-to-physical address mappings. This segmentation allows efficient management of L2P entries across memory blocks without requiring a single unwieldy tracking structure, thereby maintaining data recovery capability while reducing tracking complexity.
2Adaptability or versatility
If L2P entries are allowed to cross memory blocks to accommodate RAIN parity operations, then data recovery flexibility is improved, but additional resources are required to track non-consecutive entries
Solution Approach 1:
The patent introduces a multi-level hierarchical structure that adds dimensional organization to L2P mapping. Instead of tracking all L2P entries in a single linear sequence across memory blocks, the system uses multiple levels of mapping tables that organize entries in a hierarchical manner, reducing the resource burden of tracking non-consecutive entries while maintaining flexibility for RAIN parity operations.
3Measurement precision
If a multi-bit indication system is implemented to record offsets between logical and physical addresses, then mapping accuracy is improved, but the complexity of the data structure increases
Solution Approach 1:
The patent pre-allocates and structures the multi-level L2P mapping data structures with predetermined organization and formatting. By establishing the hierarchical structure and offset recording mechanisms in advance, the system achieves accurate address mapping without requiring complex runtime calculations or reorganization, thereby improving mapping accuracy while keeping data structure complexity manageable through systematic design.
Data Source
AI summary
A logical to physical (L2P) mapping component can determine whether an offset between a physical page address (PPA) and a logical block address (LBA) will be altered in response to writing data corresponding to the PPA and comprising at least one redundant array of independent NAND parity bit to a first level of a logical to physical (L2P) data structure or a second level of the L2P data structure, or both. The L2P mapping component can further cause an indication comprising at least two bits corresponding to the offset to be written to the first level of the L2P data structure or the second level of the L2P data structure, or both.


