Logical Tree Memory Routing for Loop-Free Path Management
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Solution Overview
Problem
Memory fabrics that assume a single path for data transmission can experience loops and unpredictable behavior when scaling, leading to delays and failure in routing requests due to multiple paths and dynamic changes in memory system components.
Innovation Solution
A method to create a logical tree in a memory system by determining a root router memory module and identifying loop-free paths, using priority values and identification numbers to organize router memory modules and prevent loops, allowing for efficient routing and handling of component additions or failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory fabrics use multiple paths for data transmission to improve routing flexibility and scalability, then routing adaptability and system capacity are improved, but loops and unpredictable behavior occur leading to reduced reliability
Solution Approach 1:
The patent segments the physical mesh network into multiple logical trees, each providing a unique loop-free path from root to leaf nodes. This segmentation allows the system to maintain multiple routing paths for adaptability while ensuring each individual path is loop-free for reliability. The logical tree structure divides the network into hierarchical segments with clear parent-child relationships.
Solution Approach 2:
The patent introduces logical tree structures as intermediary layers between the physical network infrastructure and the data transmission paths. These logical trees act as mediators that organize physical connections into hierarchical structures with designated root nodes and leaf nodes, providing loop-free routing paths while maintaining the underlying physical network's connectivity and flexibility.
2Device complexity
If memory fabrics assume a single path for data transmission to simplify routing logic, then routing simplicity and predictability are improved, but routing flexibility and scalability are reduced
Solution Approach 1:
The patent implements dynamic path selection within the logical tree structure. While each logical tree provides a simple loop-free path, the system can dynamically select among multiple logical trees based on current network conditions, component status, and routing requirements. This allows the routing logic to remain simple for individual path selection while gaining flexibility through dynamic tree selection.
Solution Approach 2:
The patent performs preliminary organization of the physical network into logical tree structures during system initialization or reconfiguration events. This preliminary action creates pre-defined loop-free paths that simplify runtime routing decisions. The routing logic only needs to select among pre-organized logical trees rather than performing complex loop detection and avoidance during active data transmission.
3Quantity of substance
If memory systems scale up in size to increase capacity and performance, then system capacity and processing power are improved, but loops and unpredictable behavior increase leading to reduced system reliability
Solution Approach 1:
The patent employs a nested hierarchical structure where logical trees are nested within the larger memory fabric system. Each logical tree is a self-contained loop-free structure that can be independently managed. When the system scales, additional logical trees can be nested into the existing hierarchy, allowing capacity expansion while maintaining the loop-free property at each nesting level through the root-to-leaf path structure.
4Adaptability or versatility
If memory systems dynamically add or remove components to improve adaptability and maintenance, then system adaptability and ease of maintenance are improved, but routing stability and predictability are reduced due to potential loops
Solution Approach 1:
The patent performs preliminary reorganization of the physical network into new logical tree structures when components are added or removed. This preliminary action ensures that any routing changes are made in a controlled manner that maintains the loop-free property. The system re-establishes logical tree hierarchies with updated root and leaf nodes based on the new component configuration, ensuring routing stability is restored after dynamic changes.
Data Source
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AI summary
The present disclosure discloses a method comprising: • determining a root router memory module of a memory system comprising a plurality of router memory module, each router memory module comprising at least one port to connect the router memory module to at least another router memory module, • for each router memory module apart from the root router memory module, identifying a loop-free path from the router memory module to the root router memory module, • creating a logical tree using the loop-free paths determined.