Logical Volume Cache Mapping for Multi-Host Load Balancing
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Solution Overview
Problem
Performance of storage systems is adversely impacted by cache-related issues when processing IO requests from multiple host devices with varying workloads, leading to inefficiencies in storage cache management.
Innovation Solution
Implement synchronized mapping of logical storage volume address ranges to cache entities across multiple host devices, using an orchestrator device to ensure consistent mapping and load balancing, leveraging MPIO drivers and management stations to manage cache-aware IO operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If storage systems process IO requests from multiple host devices with varying workloads, then the storage system can serve diverse applications and workloads, but cache-related issues adversely impact performance
Solution Approach 1:
The patent introduces an orchestrator as an intermediary component that manages and coordinates cache operations across multiple host devices. The orchestrator maintains a centralized mapping of logical block address ranges to cache entities, receiving mapping-related communications from host devices and distributing updated mappings to ensure consistent cache-aware load balancing across the storage system.
Solution Approach 2:
The patent dynamically adjusts cache mapping parameters based on workload characteristics. By modifying the mapping of logical block addresses to cache entities according to actual usage patterns and workload types, the system optimizes cache utilization for different application scenarios while maintaining overall system performance.
2Productivity
If write requests are initially stored in local caches and then destaged to destination storage devices, then write performance is improved, but cache management complexity increases
Solution Approach 1:
The orchestrator serves as a central coordinator that manages cache mapping information across multiple host devices and storage controllers. It receives mapping-related communications from host devices, processes cache entity assignments, and distributes updated mappings to relevant components, thereby simplifying the overall cache management architecture while enabling write performance optimization.
Solution Approach 2:
The patent divides the cache management function into separate components: local caches at storage controllers for fast write operations, and a centralized orchestrator for mapping management. This segmentation allows write requests to be handled quickly by local caches while the orchestrator independently manages the complexity of cache entity mapping and load balancing.
3Reliability
If synchronized mapping is implemented across multiple host devices, then cache-aware load balancing is achieved, but system complexity increases
Solution Approach 1:
The orchestrator acts as a centralized intermediary that maintains the authoritative mapping of logical block addresses to cache entities. Host devices communicate mapping-related information to the orchestrator, which processes and distributes consistent mappings across the system. This centralization achieves synchronized cache-aware load balancing while containing system complexity within the orchestrator component.
Solution Approach 2:
The system implements feedback mechanisms where host devices send mapping-related communications to the orchestrator, which then distributes updated mappings back to the hosts. This feedback loop ensures all host devices maintain consistent cache mappings, enabling effective cache-aware load balancing across the distributed storage system.
Data Source
AI summary
An apparatus in one embodiment comprises at least one processing device configured to store a mapping for each of a plurality of logical storage devices of a storage system, the mapping for a given one of the logical storage devices assigning different ranges of logical block addresses of that logical storage device to respective different cache entities of the storage system. The at least one processing device is further configured to receive at least one mapping-related communication from at least one of first and second host devices that have shared access to the given logical storage device, to modify the stored mapping for the given logical storage device based at least in part on the at least one received mapping-related communication, and to send at least one mapping-related communication to at least one of the first and second host devices based at least in part on the modified stored mapping.