Long Channel FinFET Formation via Substrate Source/Drain Placement
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Solution Overview
Problem
The challenge in integrated circuit (IC) fabrication is creating a long channel device with vertical FinFETs, as conventional methods result in surface roughness, cornered channels, and reliability issues due to the need to etch away lower spacers, which complicates control of channel length and adds additional masking steps.
Innovation Solution
The solution involves forming source/drain regions in the semiconductor substrate below the fin, allowing for a long channel to extend laterally through the fin, eliminating the need to etch away lower spacers and enabling easier control of channel length without additional mask steps, thus maintaining compatibility with vertical FinFET technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional methods are used to form long channel devices with vertical FinFETs, then a long channel can be created, but surface roughness and cornered channels are generated due to etching away lower spacers
Solution Approach 1:
The patent extracts the problematic lower spacer removal step from the fabrication process. Instead of etching away the lower spacer to create a long channel, the invention forms source/drain regions directly in the substrate below the fin, eliminating the need to remove the lower spacer entirely. This extraction of the harmful step resolves the contradiction by achieving long channel length without the detrimental surface roughness and cornered channel effects.
Solution Approach 2:
The patent inverts the conventional approach by forming source/drain regions in the substrate below the fin rather than above it. This inversion allows the channel to extend laterally through the fin from one side to the other, creating a long channel without requiring spacer removal. The inverted geometry fundamentally changes how the long channel is achieved, avoiding all associated problems.
2Length of moving object
If lower spacers are etched away to create long channel devices, then channel length is increased, but additional masking steps are required
Solution Approach 1:
The patent removes the lower spacer etching step from the fabrication sequence entirely. By forming source/drain regions directly in the substrate below the fin using existing masks, the process eliminates the need for additional masking steps that would be required to protect other structures during spacer removal. This extraction simplifies the overall fabrication process while maintaining long channel functionality.
3Volume of moving object
If source/drain regions are formed above the fin in vertical FinFETs, then vertical scaling is achieved, but long channel formation becomes incompatible
Solution Approach 1:
The patent transitions from vertical source/drain placement to lateral source/drain placement in the substrate. By moving the source/drain regions to another dimension (the substrate plane below the fin rather than above it), the invention simultaneously achieves both vertical FinFET scaling and long channel functionality. This dimensional change allows the channel to extend laterally through the fin while maintaining the vertical FinFET structure.
Data Source
AI summary
A method of forming an integrated circuit includes forming a FinFET by: forming a semiconductor fin on a semiconductor substrate; forming a first source/drain region in the semiconductor substrate under a first end of the semiconductor fin and a second source/drain region in the semiconductor substrate under a second, opposing end of the semiconductor fin, the second source/drain region separated from the first source/drain region by a portion of the semiconductor substrate having an opposite doping from that of the first and second source/drain region; and forming a surrounding gate extending about the semiconductor fin above the semiconductor substrate. A second vertical FinFET may be formed simultaneously. The method allows the FinFET to have a long channel extending laterally through its fin compared to the short channel of the vertical FinFET, thus creating short channel and long channel devices together without impacting vertical FinFET height.