Look-Ahead LDPC Decoding to Avoid Read-Before-Write Stalls

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Low Density Parity Check (LDPC) decoders in communication networks face read-before-write hazards, which cause stalls during decoding operations, leading to incomplete data decoding within the available time interval due to dependencies between bit nodes and check nodes.

Innovation Solution

A look-ahead LDPC decoder is introduced, which determines potential stalling conditions by caching results from one check node and using them to compute bit node values before receiving results from the other check node, thereby preventing stalls by allowing computations to proceed without waiting for prior results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the decoder waits for prior constraint determination to complete before processing subsequent constraints, then computation accuracy is maintained, but decoding speed deteriorates due to stalls

Engineering Contradiction:
Improvecomputation accuracyVSAvoiddecoding speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by computing and storing intermediate results (e.g., QA and QB messages) before all input data is available. The bit node computation prepares and transmits messages to check nodes in advance, using cached values to prevent stalls while maintaining accuracy through subsequent difference computations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the decoder processes constraints sequentially waiting for prior results, then read-before-write hazards are avoided, but decoding time increases beyond available time interval

Engineering Contradiction:
Improvedata integrityVSAvoiddecoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The decoder performs preliminary computations and transmits messages to check nodes before all results are available. Intermediate values are cached and used to prevent stalls, allowing the decoding process to proceed without waiting for prior constraint completions while maintaining data integrity through difference computations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediate cached results as mediators between bit node computations and check node processing. These cached intermediate values (QA, QB messages) allow check nodes to proceed with computations without waiting for final bit node updates, eliminating read-before-write hazards while maintaining correctness.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the decoder allows parallel computation without waiting for prior results, then decoding throughput improves, but read-before-write hazards occur

Engineering Contradiction:
Improvedecoding throughputVSAvoidcomputation correctness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Cached intermediate results serve as intermediaries that enable parallel computation while preventing read-before-write hazards. The check nodes use these cached intermediate values (difference computations) instead of reading directly from bit nodes that may not yet have updated values, ensuring computation correctness while maintaining high throughput.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10374631B2Look-ahead LDPC decoder
Publication Date: 2019.08.06 CHENGDU XINSHENG INTEGRATED CIRCUIT CO LTD
  • US10374631B2 patent drawing
  • US10374631B2 patent drawing
  • US10374631B2 patent drawing

AI summary

Look-ahead LDPC decoder. In an exemplary embodiment, a method includes generating a message (QA) to a first check node, the QA message is generated from a result (RA) from the first check node, and generating a message (QB) to a second check node, the QB message is generated from the result (RA) and is transmitted to avoid decoder stall. The method also includes receiving a result (R′A) from the first check node, computing a difference (R″A) between the result (R′A) and the result (RA), and receiving a result (R′B) from the second check node. The method also includes computing a bit value P(B) using the difference (R″A) and the result (R′B).