Lookahead Priority Collection in Memory Queues for SoC Arbitration
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Solution Overview
Problem
In multi-core System on Chip (SoC) architectures, existing priority schemes can lead to stalls when lower priority requests are delayed by higher priority requests, causing inefficiencies in memory access arbitration, particularly in scenarios where high priority transactions need to propagate priority across the memory system.
Innovation Solution
Implementing a priority elevation mechanism that allows high priority requests to elevate the priority of all older requests in the queue, enabling direct communication of priority from the core's memory system to the EDMA interface, and using a hierarchical lookahead priority collection mechanism to calculate the overall priority of the memory system, ensuring that high priority transactions are processed efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional priority schemes are used for memory access arbitration in multi-core SoC, then higher priority requests can preempt lower priority requests, but this causes stalls when lower priority requests are delayed by higher priority requests
Solution Approach 1:
The patent implements dynamic priority adjustment where the priority of requests is not fixed but can change based on system state. Specifically, when a high-priority request is detected in the memory system, the priority of all older requests in the queue is elevated to ensure timely processing. This dynamic reassignment of priorities resolves the contradiction by adapting the arbitration scheme to actual system needs rather than following rigid static priorities.
Solution Approach 2:
The patent applies preliminary action by detecting high-priority requests in advance and proactively elevating the priority of all older requests in the queue before they are processed. This lookahead mechanism allows the system to prepare for potential stalls by adjusting priorities ahead of time, preventing delays before they occur rather than reacting after stalls have happened.
2Productivity
If priority elevation mechanism is implemented to allow high priority requests to elevate priority of all older requests in queue, then system responsiveness improves, but arbitration complexity increases
Solution Approach 1:
The patent segments the arbitration process into distinct stages: priority detection, priority elevation decision, and request queue management. By dividing the complex arbitration task into separate functional blocks, each handling a specific aspect of priority management, the system achieves improved responsiveness without overwhelming complexity. Each segment can be optimized independently and the overall system remains manageable through modular design.
Solution Approach 2:
The patent introduces an intermediary priority elevation mechanism that sits between the request generation stage and the memory access stage. This intermediary layer collects priority information from multiple sources, makes elevation decisions, and manages the request queue accordingly. By inserting this mediating layer, the patent simplifies the overall arbitration complexity while maintaining high system responsiveness, as the intermediary handles the complex decision-making centrally rather than requiring complex coordination across multiple components.
3Speed
If hierarchical lookahead priority collection mechanism is used to calculate overall priority of memory system, then high priority transactions are processed efficiently, but communication overhead increases
Solution Approach 1:
The patent merges the priority collection function across the entire memory system hierarchy into a unified lookahead priority mechanism. Instead of having separate priority management at each level of the memory hierarchy, the system combines priority information from all levels and calculates an overall priority state. This merging approach enables efficient high-priority transaction processing by providing a consolidated view of system priority state, while the unified mechanism reduces communication overhead compared to multiple independent priority collection systems.
Data Source
AI summary
A queuing requester for access to a memory system is provided. Transaction requests are received from two or more requestors for access to the memory system. Each transaction request includes an associated priority value. A request queue of the received transaction requests is formed in the queuing requester. Each transaction request includes an associated priority value. A highest priority value of all pending transaction requests within the request queue is determined. An elevated priority value is selected when the highest priority value is higher than the priority value of an oldest transaction request in the request queue; otherwise the priority value of the oldest transaction request is selected. The oldest transaction request in the request queue with the selected priority value is then provided to the memory system. An arbitration contest with other requesters for access to the memory system is performed using the selected priority value.


