Reconfigurable Shared Memory Tiles for Parallel Lookup Allocation
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Solution Overview
Problem
Existing lookup systems in network processors are inflexible, as they use a fixed number of memories for each lookup and cannot switch between hash-based and direct-access techniques, limiting memory utilization and adaptability to different applications.
Innovation Solution
A system-on-chip that supports multiple parallel lookups using a pool of shared memories, where the number of memories allocated for each lookup is reconfigurable, and each lookup can be configured as either hash-based or direct-access, with memories grouped into tiles and connected via reconfigurable networks to enable parallel operations without collisions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed number of memories is allocated for each lookup in prior art systems, then the system structure is simple and stable, but the memory utilization is low and the system cannot adapt to different applications
Solution Approach 1:
The patent implements dynamic memory allocation where the number of memories allocated to each lookup engine can be reconfigured at runtime based on application requirements. The memory pool is dynamically partitioned among multiple lookup engines, allowing each engine to have a different number of memories allocated to it, thus resolving the contradiction between adaptability and structural simplicity.
Solution Approach 2:
The patent creates a universal memory pool that can serve multiple lookup engines with different memory requirements. The same pool of memories can be allocated in different configurations to support various lookup techniques (hash-based, direct-access, TCAM) and different application scenarios, making the system universally adaptable without requiring separate dedicated memories for each engine.
2Productivity
If prior art systems use fixed memory allocation for each lookup, then the system is easy to implement, but memory utilization cannot reach 100% and lookup efficiency is limited
Solution Approach 1:
The patent merges multiple dedicated memory structures into a single shared memory pool that is collectively used by all lookup engines. This consolidation eliminates memory waste from fixed allocation and allows the system to achieve 100% memory utilization by dynamically assigning memories from the pool to lookup engines based on their current needs, thereby improving both productivity and memory utilization.
3Adaptability or versatility
If prior art systems cannot switch between hash-based and direct-access lookup techniques, then the system design is simple, but the system cannot optimize for different lookup scenarios
Solution Approach 1:
The patent enables parameter changes by allowing the lookup technique type (hash-based, direct-access, TCAM) and the number of memories allocated to each engine to be reconfigured dynamically. This is achieved through programmable control logic that can change the operational parameters of lookup engines and memory allocation without hardware redesign, thus improving adaptability while keeping the physical structure relatively simple.
4Productivity
If multiple lookups share a pool of memories with reconfigurable allocation, then memory utilization is optimized and adaptability is improved, but the system complexity increases due to reconfigurable networks and allocation management
Solution Approach 1:
The patent segments the memory pool into discrete allocable units and divides the reconfigurable interconnect into manageable switching fabrics. The memory pool is organized as T×M shared memories that can be independently allocated, and the interconnect is divided into input and output reconfigurable fabrics that can be independently controlled. This segmentation reduces the complexity of managing the entire system as a single reconfigurable unit while still enabling parallel lookup operations.
Data Source
AI summary
Embodiments of the present invention relate to multiple parallel lookups using a pool of shared memories by proper configuration of interconnection networks. The number of shared memories reserved for each lookup is reconfigurable based on the memory capacity needed by that lookup. The shared memories are grouped into homogeneous tiles. Each lookup is allocated a set of tiles based on the memory capacity needed by that lookup. The tiles allocated for each lookup do not overlap with other lookups such that all lookups can be performed in parallel without collision. Each lookup is reconfigurable to be either hash-based or direct-access. The interconnection networks are programmed based on how the tiles are allocated for each lookup.