Lookup Table Placement Across Memory Channels for Balanced Bandwidth
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Solution Overview
Problem
Current computing devices do not effectively utilize memory channel bandwidth due to uneven usage patterns of lookup tables, leading to busy and idle channels, which results in suboptimal performance.
Innovation Solution
A computing device with an indexer circuit that dynamically arranges lookup tables across multiple memories through multiple memory channels based on their characteristics and bandwidth, balancing the transmission load to maximize bandwidth utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If lookup tables are loaded to specific memory using traditional methods, then the memory channel transmission bandwidth is utilized, but some memory channels become busy while others remain idle due to uneven lookup table usage patterns
Solution Approach 1:
The patent segments lookup tables into different groups based on their access characteristics (access frequency, data amount). Frequently accessed tables with small data amounts are assigned to one set of memory channels, while rarely accessed tables with large data amounts are assigned to another set. This segmentation balances the transmission load across multiple memory channels, preventing some channels from being overloaded while others remain idle.
Solution Approach 2:
The patent applies local quality by assigning different lookup tables to different memory channels based on their specific access patterns and data characteristics. Each memory channel is optimized for specific types of lookup tables, creating a non-uniform distribution that matches the local access requirements. This ensures that each memory channel operates at optimal utilization levels according to the specific needs of the tables it serves.
2Device complexity
If all lookup tables are accessed through the same memory channel, then the system structure is simple, but the transmission bandwidth cannot be effectively utilized and processor waiting time increases
Solution Approach 1:
The patent transitions from a single-dimension memory channel structure to a multi-dimensional structure by introducing multiple memory channels with different characteristics. Instead of using one memory channel for all lookup tables, the system creates a dimensional expansion where lookup tables can be accessed through different channels simultaneously. This dimensional change enables parallel access operations, reducing processor waiting time while maintaining manageable system complexity through structured channel assignment.
3Reliability
If lookup tables with large data amounts are accessed frequently, then the computation results are accurate and complete, but the memory channel transmission bandwidth is overwhelmed causing performance degradation
Solution Approach 1:
The patent implements a copying strategy where lookup tables are assigned to specific memory channels based on their access patterns. Tables that require large transmission bandwidth are copied to dedicated memory channels that are optimized for their access frequency. This copying approach ensures that the complete and accurate data is available when needed, while distributing the bandwidth burden across multiple channels to maintain overall system performance.
Data Source
AI summary
A computing device and an operation method thereof are provided. The computing device includes multiple memories and an indexer circuit. The indexer circuit is separately coupled to the memories through multiple memory channels. The indexer circuit determines an arrangement of at least one lookup table to at least one of the memories according to a characteristic of the at least one lookup table and a transmission bandwidth of the memory channels, so as to balance a transmission load of the memory channels.