Look-Up Table Write Instructions for Lower-Latency DSP Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Modern digital signal processors face challenges with increasing workloads, memory system latency, memory and register reliability, and routing congestion, particularly in systems on a chip (SOC), which impact algorithm performance and efficiency.
Innovation Solution
A digital data processor is designed with an instruction memory, instruction decoder, and operational units that perform table writes in response to look-up table instructions, allowing data elements to be written to specified locations in tables for efficient data processing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If table look-up techniques are used for filtering functions, then processing efficiency is improved for seldom-used and difficult mathematical functions, but device complexity increases due to additional table memory and write operations
Solution Approach 1:
The operational unit is designed to perform multiple functions including table write operations, table read operations, and general data processing operations. This multi-functionality allows the same hardware structure to support both complex mathematical function evaluation through table look-up and standard processing tasks, improving productivity without proportionally increasing device complexity
Solution Approach 2:
Data tables are pre-loaded with calculated values for seldom-used and difficult mathematical functions. This preliminary action allows the processor to quickly retrieve pre-computed results through simple table look-up operations rather than performing complex calculations in real-time, significantly improving processing efficiency for these specific functions
2Measurement precision
If more tables are written and maintained for complex algorithms, then measurement precision is improved for mathematical functions, but loss of time increases due to additional write operations and memory management
Solution Approach 1:
The processor automatically manages table write operations through dedicated instructions that are integrated into the normal instruction execution flow. The operational unit handles table maintenance self-service style, reducing the need for external memory management overhead and minimizing the time penalty associated with maintaining multiple tables for complex algorithms
Data Source
AI summary
A digital data processor includes an instruction memory storing instructions each specifying a data processing operation and at least one data operand field, an instruction decoder coupled to the instruction memory for sequentially recalling instructions from the instruction memory and determining the data processing operation and the at least one data operand, and at least one operational unit coupled to a data register file and to the instruction decoder to perform a data processing operation upon at least one operand corresponding to an instruction decoded by the instruction decoder and storing results of the data processing operation. The at least one operational unit is configured to perform a table write in response to a look up table write instruction by writing at least one data element from a source data register to a specified location in a specified number of at least one table.