Loop Accelerator Phase Segmentation for Routing Resource Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional data processing systems experience performance degradation due to unnecessary occupation of routing resources as the loop accelerator constantly occupies data processing cells for live-in and live-out values, even when data exchange with the central register file is not necessary, leading to congestion and limited application usage.

Innovation Solution

Divide the loop into three phases: initialization, kernel, and finalization, where the loop accelerator configures its array differently for each phase, releasing the central register file during the kernel phase to avoid unnecessary data exchange and optimize resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the loop accelerator constantly occupies data processing cells for routing live-in and live-out values, then data exchange between the loop accelerator and central register file is ensured, but routing resources are unnecessarily occupied leading to congestion and performance degradation

Engineering Contradiction:
Improvedata exchange reliabilityVSAvoiddata processing performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The loop execution is segmented into three distinct phases: initialization phase (where data is fetched from central register file), kernel phase (where computation is performed without central register file access), and finalization phase (where results are written back). The loop accelerator reconfigures its array differently for each phase, occupying routing resources only during initialization and finalization phases, thereby eliminating unnecessary resource occupation during the kernel phase while maintaining data exchange reliability when needed

Inventive Principle:
Principle #1Segmentation

2Reliability

If the loop accelerator occupies routing resources throughout the entire loop execution, then data exchange is maintained, but other tasks cannot utilize the freed data processing cells

Engineering Contradiction:
Improvedata exchange reliabilityVSAvoidapplication support capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The loop accelerator employs dynamic reconfiguration of its array structure based on the current execution phase. During the kernel phase, the array is reconfigured to release routing resources, allowing other tasks to utilize the data processing cells. The configuration memory stores different configuration sets that are activated according to the phase, enabling the system to adapt resource allocation dynamically while maintaining data exchange reliability during initialization and finalization phases

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8019982B2Loop data processing system and method for dividing a loop into phases
Publication Date: 2011.09.13 SAMSUNG ELECTRONICS CO LTD
  • US8019982B2 patent drawing
  • US8019982B2 patent drawing
  • US8019982B2 patent drawing

AI summary

A data processing system and method. The data processing system includes a processor core that executes a program; a loop accelerator that has an array consisting of a plurality of data processing cells and executes a loop in a program by configuring the array according to a set of configuration bits; and a centralized register file which allows data used in the program execution to be shared by the processor core and the loop accelerator. The loop accelerator divides the configuration of the array into at least three phases according to whether data exchange with the central register file is conducted during the loop execution. Thus, unnecessary occupation of the routing resource, which is used for the data exchange between the loop accelerator and the central register file during the loop execution, can be avoided.