Loop-Aware Software Simulation for Faster Verification
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Solution Overview
Problem
The increasing scale and complexity of in-vehicle software operations necessitate a reduction in the time required for software verification using simulation apparatuses, as longer software programs prolong the verification process.
Innovation Solution
Incorporation of a loop instruction sequence detector and an instruction computing section in the simulation apparatus to detect loop instruction sequences and execute them a predetermined number of times, thereby reducing the simulation time by avoiding repetitive execution of loops that do not shift the CPU state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the simulation apparatus sequentially executes all instructions in the software program to verify operations, then the verification completeness is improved, but the verification time increases
Solution Approach 1:
The patent extracts loop instruction sequences from the software program and executes them separately a predetermined number of times. By taking out repetitive loop instructions and handling them differently from sequential instructions, the system verifies loop operations without executing the entire program sequentially, thus reducing verification time while maintaining completeness.
Solution Approach 2:
The patent performs preliminary detection of loop instruction sequences before full verification. The loop instruction sequence detector identifies loop structures in advance, allowing the system to prepare optimized execution strategies for these sequences, reducing the time required during the actual verification process.
2Loss of time
If the simulation apparatus executes loop instruction sequences a predetermined number of times, then the simulation time is reduced, but the device complexity increases
Solution Approach 1:
The patent segments the instruction execution process into two distinct paths: one for sequential instructions and another for loop instruction sequences. The loop instruction sequence detector identifies loop structures, and the instruction computing section handles them differently by executing them a predetermined number of times. This segmentation allows time reduction through optimized loop handling while keeping the added complexity localized and manageable.
Data Source
AI summary
A simulation apparatus includes a loop instruction sequence detector and an instruction computing section. The loop instruction sequence detector detects a loop instruction sequence included in a target program and generates a loop instruction sequence detection signal. When the loop instruction sequence detection signal is generated, the instruction computing section executes the loop instruction sequence once and generates a simulation elapsed time required for executing the loop instruction sequence a predetermined number of times.