Loop PUF Ring Oscillator Circuit Design for Reliable Signature Generation
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Solution Overview
Problem
Existing silicon PUFs, such as arbiter and ring oscillator PUFs, face challenges in design complexity due to path balancing requirements and sensitivity to noise and interference, which affects their reliability and resistance to attacks.
Innovation Solution
A silicon integrated circuit with a Loop Physically Unclonable Function (LPUF) that uses a ring oscillator with N identical chains of delay elements and an inversion gate, configured by control words to generate a unique signature, and a method for testing circuits to select reliable ones based on frequency measurements and Hamming distance criteria.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If arbiter PUF paths are used to generate signatures, then unique identification is achieved, but design complexity increases due to path balancing requirements
Solution Approach 1:
The patent applies asymmetry by intentionally introducing controlled delays in one path of the arbiter PUF while leaving the other path with minimal delay. This asymmetric delay configuration simplifies the design by eliminating the need for complex path balancing, as the deliberate delay difference creates stable, distinguishable paths that naturally generate reliable signatures without requiring precise symmetry adjustment.
2Ease of manufacture
If ring oscillator PUFs are used for signature generation, then implementation simplicity is improved, but sensitivity to noise and interference increases
Solution Approach 1:
The patent segments the ring oscillator PUF into multiple independent oscillating paths with deliberately different delays. By dividing the single oscillator into separate paths that can be independently controlled and measured, the system reduces sensitivity to noise and interference affecting any single path, while maintaining the implementation simplicity of ring oscillator structures.
3Measurement precision
If multiple measurements are performed to improve signature reliability, then authentication accuracy increases, but measurement time increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing optimal threshold values during the design phase based on expected delay variations. During operation, these pre-established thresholds enable rapid comparison with measured delay differences, allowing accurate signature bit determination with minimal measurements and reducing the time required for authentication while maintaining high precision.
Data Source
AI summary
A silicon integrated circuit includes a physically non-copyable function LPUF that generates a signature specific to the circuit. The function includes a ring oscillator composed of a loop traversed by a signal. The loop is formed of N topologically identical chains of lags connected in series and an inversion gate, a chain of lags being composed of M delay elements connected in series. The function also includes a control module generating N control words being used to configure the value of the delays introduced by the chains of lags on the signal traversing them. A measurement module measures the frequency of the signal at the output of the last chain of lags after updating the control words, and the control module can deduce from the frequency measurements the bits making up the signature of the circuit. A method and a system for testing such circuits are also provided.