Loss of Signal Detection Circuit Using Asynchronous Sampling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Loss of Signal (LOS) detection circuits in receivers are inefficient in quickly distinguishing between active signals and noise, often requiring clock/data recovery processes that delay detection and increase power consumption.
Innovation Solution
A system and method utilizing an internal asynchronous reference clock to sample incoming signals across multiple thresholds, producing sample streams that are counted to discriminate between active and lost signal conditions, allowing for independent and faster LOS detection without requiring signal equalization or clock recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional LOS detection circuits are used, then signal loss detection is performed, but detection speed is slow and power consumption is high due to required clock/data recovery processes
Solution Approach 1:
The patent extracts the essential LOS detection function from the complex clock/data recovery process. By using a simple counter that tallies transitions in the received signal against a reference clock, the system performs LOS detection without requiring full clock recovery, thereby reducing power consumption while maintaining detection capability
Solution Approach 2:
The patent replaces the traditional mechanical/synchronous clock recovery mechanism with an asynchronous counter-based approach. The counter operates independently of the received signal's clock, using only a reference clock and simple transition counting, which eliminates the power-intensive clock recovery process while enabling faster LOS detection
2Loss of time
If clock/data recovery processes are used for LOS detection, then accurate signal analysis is achieved, but detection time is delayed
Solution Approach 1:
The patent performs preliminary action by continuously counting transitions in the received signal against the reference clock before full clock recovery is needed. This allows the system to detect LOS conditions earlier in the signal processing pipeline, reducing detection time while maintaining accuracy through the counter's ability to distinguish signal transitions from noise
Solution Approach 2:
The patent applies partial action by implementing only the essential transition counting function needed for LOS detection, rather than performing the complete clock/data recovery process. This partial implementation achieves sufficient measurement precision for LOS detection while significantly reducing the time required
3Measurement precision
If simple signal reception is used, then power consumption is reduced, but inability to distinguish noise from active signals occurs
Solution Approach 1:
The counter circuit serves itself by using the reference clock and simple transition counting to automatically distinguish signal from noise. The system requires no external complex processing or additional sophisticated components - the counter naturally accumulates transition counts that differentiate active signals (with regular transitions) from noise (with random or insufficient transitions), achieving accurate discrimination through self-service operation
Solution Approach 2:
The patent changes the parameter being measured from complex signal characteristics (requiring full clock recovery) to a simple transition count parameter. By monitoring the number of transitions within a fixed time window against a reference clock, the system achieves accurate signal-vs-noise discrimination through this parameter change, maintaining low circuit complexity
Data Source
Figure 1
Figure 2
Figure 3a~3b
AI summary
Apparatus and methods are taught for quickly determining whether a Loss of Signal (LOS) condition has occurred for a receiver which includes an internal reference clock, a LOS circuit and a Clock and Data Recovery (CDR) circuit. The CDR circuit recovers the clock and data of an incoming signal. However, the LOS circuit can determine whether a received incoming signal includes an active signal, independent of said CDR circuit such that it samples said incoming signal utilizing said internal reference clock to determine a loss of signal prior to said CDR recovering the clock of said incoming signal. The LOS circuit includes an analog voltage threshold stage which samples the incoming signal, and produces at least one sample stream indicative of transitions in the incoming signal. The LOS circuit further includes a digital transition stage which counts transitions in order to discriminate between an active signal and noise.