Lossless User-Level Tracing via Scratch Space Execution

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for tracing instrumented software systems are either 'lossy' due to missed probe triggers in multi-threaded environments or 'lossless' but perturb the execution by suspending all threads, which can distort observed effects.

Innovation Solution

A method and system for tracing instrumented programs on architectures supporting pc-relative addressing, where a thread executes original instructions and jump instructions in a scratch space, allowing for lossless data collection without thread suspension, using a trap handler and look-up table to manage probe interactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the original instruction is single-stepped in the kernel (lossless tracing), then all probe triggers are captured accurately, but all other threads are suspended causing execution perturbation

Engineering Contradiction:
Improvetracing accuracyVSAvoidexecution continuity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The patent divides the tracing execution into two segments: probe triggering and instruction single-stepping. Threads can trigger probes independently without blocking, while the actual single-stepping of original instructions occurs separately in user-mode scratch space. This segmentation allows multiple threads to progress simultaneously without mutual interference, eliminating the need to suspend all threads for tracing operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism (scratch space in user-mode) that buffers the original instruction execution. Instead of directly single-stepping instructions in the kernel which blocks all threads, the original instruction is copied to scratch space and executed there. This intermediary approach enables asynchronous probe handling and maintains thread execution continuity while preserving tracing accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If trap instructions are used for probes in multi-threaded environments, then probe data can be collected, but some threads may miss probe triggers causing lossy tracing

Engineering Contradiction:
Improvetracing efficiencyVSAvoidprobe trigger coverage
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent creates a copy of the original instruction in a scratch space rather than modifying the original code path with trap instructions. This copying approach allows multiple threads to execute their respective instruction copies independently without interfering with each other's probe triggers. Each thread gets its own copy to single-step, ensuring that probe triggers are captured for all threads simultaneously without the race conditions inherent in shared trap instruction approaches.

Inventive Principle:
Principle #26Copying

3Measurement precision

If threads are suspended for serialized tracing execution, then lossless data collection is achieved, but system performance and observation accuracy deteriorate

Engineering Contradiction:
Improvedata collection completenessVSAvoidsystem performance
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent implements dynamic parallel execution where multiple threads can simultaneously trigger probes and execute their respective original instruction copies in user-mode scratch space. The tracing framework dynamically manages these parallel executions without requiring global thread suspension. This dynamic approach maintains complete probe trigger coverage (lossless tracing) while allowing the system to continue processing, thereby preserving system performance and preventing the energy loss associated with serializing all thread executions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7620941B1Mechanism for lossless user-level tracing on an architecture supporting PC-relative addressing
Publication Date: 2009.11.17 ORACLE AMERICAN INC
  • US7620941B1 patent drawing
  • US7620941B1 patent drawing
  • US7620941B1 patent drawing

AI summary

A method for tracing an instrumented program involves triggering a probe in the instrumented program, obtaining an original instruction associated with the probe, storing the original instruction into a scratch space, storing a jump instruction for an architecture that supports pc-relative addressing into the scratch space, wherein the jump instruction includes a next program counter value, executing the original instruction in the scratch space using a thread, and executing the jump instruction in the scratch space using the thread.