Low-Aspect-Ratio TSV Sensor Package for Simpler Insulator Formation
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Solution Overview
Problem
The complex and costly process of forming through silicon vias (TSVs) in ambient light sensors and CMOS image sensors, particularly due to long etching times and multiple photolithography steps required for silicon dioxide deposition, complicates bottom side processing and increases manufacturing costs.
Innovation Solution
A method involving a semiconductor substrate with a thin thickness distance between sides, a transparent cover, an insulator layer with photo-imageable material, and second conductive routing structures that extend through via openings to directly contact the first conductive routing structures, facilitating cost-effective insulator formation and reduced manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional CVD deposition and patterning of silicon dioxide is used to form insulator layers, then reliable electrical isolation is achieved, but manufacturing complexity and cost increase due to multiple photolithography process steps
Solution Approach 1:
The patent replaces expensive, multi-step CVD silicon dioxide deposition with a single-step spin-coating process using photo-imageable organic insulator materials. This disposable-like approach uses simpler, cheaper materials and processes that achieve the same electrical isolation function without requiring complex equipment or multiple photolithography steps, thereby reducing manufacturing complexity while maintaining reliability
Solution Approach 2:
The patent substitutes the mechanical/chemical CVD deposition process with a spin-coating process that uses centrifugal force to deposit the insulator material. This mechanical substitution simplifies the manufacturing process by replacing complex CVD equipment and multiple photolithography steps with a single spin-coating step followed by photolithography, reducing overall process complexity while achieving the same electrical isolation effect
2Reliability
If deep through silicon vias are etched through thick semiconductor substrates, then electrical connections are established, but manufacturing time and cost increase due to long etching times
Solution Approach 1:
The patent changes the thickness parameter of the semiconductor substrate from traditional thick substrates to thin substrates (e.g., 50-150 μm). This parameter change reduces the depth of via holes that need to be etched, thereby significantly reducing etching time and increasing manufacturing speed while still achieving reliable electrical connections between the top and bottom surfaces of the substrate
Solution Approach 2:
The patent performs preliminary thinning of the semiconductor substrate before via hole formation. By reducing the substrate thickness in advance (through grinding or other thinning processes), the subsequent via etching process becomes much faster and more efficient, improving overall manufacturing productivity while ensuring that the via holes can still establish reliable electrical connections through the thinned substrate
3Strength
If semiconductor substrate thickness is increased, then structural strength is improved, but via hole aspect ratio increases making insulator formation more difficult
Solution Approach 1:
The patent optimizes the substrate thickness parameter to a specific range (50-150 μm) that balances structural strength with manufacturability. This parameter change ensures the substrate is thin enough to allow easy insulator formation in via holes (low aspect ratio) but thick enough to maintain structural strength, thereby resolving the contradiction between strength and ease of manufacture
Solution Approach 2:
The patent uses photo-imageable organic insulator materials that can be deposited as thin films through spin-coating and then patterned using photolithography. This copying approach creates the insulator layer as a precise copy of the desired pattern, allowing easy formation of insulators in via holes even in thin substrates, while the substrate itself maintains sufficient thickness for structural strength
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time and costs by using low aspect ratio through silicon vias and spin coating of photo-imageable materials, enabling a compact form factor and efficient electrical connections for ambient light sensors, while allowing top-side optical light sensing without requiring holes through the host PCB.
Implementation Method 1
forming an insulator layer on the second side of the semiconductor substrate and along a sidewall of the via opening, wherein the insulator layer includes a photo-imageable material
Data Source
AI summary
An electronic device includes a semiconductor substrate having a first conductive routing structure on a first side of the semiconductor substrate, and a low aspect ratio via opening extending from the first side to an opposite second side. The electronic device includes a transparent cover over a portion of the first side and covering the patterned first conductive routing structure, as well as an insulator layer including a photo-imageable material on the second side and along a sidewall of the via opening, and a second conductive routing structure on an outer side of the insulator layer and extending through the via opening and directly contacting a portion of the first conductive routing structure.


