Low Capacitance Bus Lines on Separate Substrates
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Solution Overview
Problem
As high-resolution display devices increase in size, line resistance and line capacitance grow, leading to issues like flickering, luminance non-uniformity, cross-talk, and image retention due to increased cross-capacitance between data lines and gate lines.
Innovation Solution
The display device employs a configuration where gate lines and data lines are formed on different substrates, with a liquid crystal layer and gate insulator layer spacing them apart, reducing cross-capacitance and improving the RC delay and turn-on capability of thin-film transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the display screen size is increased for high resolution displays, then the display area and resolution are improved, but line resistance and line capacitance become greater causing flickering, luminance non-uniformity, cross-talk and image retention
Solution Approach 1:
The patent divides the display device into two separate substrates: a first substrate containing data lines and a second substrate containing gate lines. This segmentation physically separates the two types of conductive lines that previously coexisted on the same substrate, thereby reducing their interaction and the resulting cross-capacitance effects that cause display instability.
Solution Approach 2:
The patent transitions from a planar single-substrate layout to a three-dimensional dual-substrate configuration. By stacking substrates in the vertical dimension and spacing them apart, the patent increases the physical distance between data lines and gate lines, reducing electromagnetic interference and cross-capacitance while maintaining high resolution display performance.
2Device complexity
If data lines and gate lines are placed on the same substrate, then device structure is simplified, but cross capacitance between data lines and gate lines increases causing display defects
Solution Approach 1:
The patent segments the substrate into two separate entities: a first substrate for data lines and a second substrate for gate lines. This segmentation eliminates the cross-capacitance problem by ensuring that data lines and gate lines are physically separated by the substrate thickness and cell gap, preventing the harmful electromagnetic coupling that occurs when they share the same substrate.
Solution Approach 2:
The patent introduces an insulating spacer layer between the first substrate (data lines) and the second substrate (gate lines). This intermediary layer acts as a dielectric barrier that further reduces cross-capacitance between the conductive lines on different substrates, mitigating display defects caused by electromagnetic interference.
3Area of stationary object
If line length is increased to cover larger display areas, then display coverage is improved, but RC delay increases reducing transistor turn-on capability
Solution Approach 1:
The patent segments the conductive line network into two independent systems on separate substrates: data lines on the first substrate and gate lines on the second substrate. This segmentation reduces the effective length and complexity of each line network, decreasing RC delay and improving transistor turn-on capability while maintaining comprehensive display coverage.
Solution Approach 2:
By distributing lines across multiple substrates in the vertical dimension, the patent reduces the in-plane length of individual data and gate lines. This dimensional redistribution decreases the total capacitance and resistance of each line, thereby reducing RC delay and improving the speed of transistor operation across the entire display area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces cross-capacitance, mitigating issues like flickering and luminance non-uniformity, and enhances the charging time and image quality of high-definition displays.
Implementation Method 1
line capacitance become greater. Accordingly, several problems may occur such as flickering, luminance non-uniformity, cross-talk and image retention
Data Source
AI summary
A display device using low capacitance bus lines having gate lines and data lines on different substrates. The display device includes a first substrate and a second substrate spaced apart from each other, and a liquid crystal layer is disposed in the cell gap between the first substrate and the second substrate. The data lines of the display device are formed on the first substrate, and the gate lines of the display device are formed on the second substrate. The data lines formed on the first substrate and the gate lines formed on the second substrate are spaced apart by a gate insulator layer and the liquid crystal layer, which increases the gap distance between the data lines and the gate lines. Accordingly, a cross capacitance between each of the data lines and each of the gate lines can be reduced.