Low-Conductivity Interposer for Thermal Isolation in EO Multichip Modules

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Solution Overview

Problem

Next generation multi-chip-modules (MCMs) face challenges in thermal management due to thermal crosstalk between IC and EO components, necessitating efficient thermal insulation while maintaining high-speed electrical connections.

Innovation Solution

An electrically non-conductive interposer with low thermal conductivity is used between chips, made of materials like glass or fused silica, featuring RF waveguides and conductive traces for signal transmission, along with passive and active heat spreaders for temperature control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a common heat spreader is disposed on the topsides of the IC chip and the EO chip with the substrate disposed below, then heat dissipation is improved, but thermal crosstalk between the IC chip and EO chip increases

Engineering Contradiction:
Improveheat dissipationVSAvoidthermal crosstalk
Core Design Contradiction:
TemperatureVSObject-affected harmful factors

Solution Approach 1:

The patent divides the thermal management structure into separate heat spreaders for the IC chip and EO chip, rather than using a common heat spreader. This segmentation allows independent thermal control of each chip, preventing heat from the IC chip from transferring to the EO chip through the shared heat dissipation path, thus reducing thermal crosstalk while maintaining effective heat dissipation for both components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a thermally isolating substrate positioned between the IC chip and EO chip. This substrate acts as a thermal intermediary that blocks heat flow from the high-power IC chip to the temperature-sensitive EO chip, allowing each chip to have its own heat spreader without creating thermal crosstalk through a shared thermal path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If the EO chip is thermally insulated from the IC chip, then thermal crosstalk is reduced, but heat dissipation efficiency for the EO chip may be compromised

Engineering Contradiction:
Improvethermal crosstalkVSAvoidheat dissipation efficiency
Core Design Contradiction:
Object-affected harmful factorsVSTemperature

Solution Approach 1:

The patent provides the EO chip with its own dedicated heat spreader that is thermally isolated from the IC chip's heat spreader. This segmentation ensures that while heat dissipation paths are separated to prevent thermal crosstalk, each chip still has an efficient thermal path for its own heat dissipation needs through its respective heat spreader and the thermally conductive substrate.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively isolates EO components thermally from IC chips, reducing thermal crosstalk and maintaining high-speed signal transmission, while ensuring EO components operate at specific temperatures.

Implementation Method 1

an electrically non-conductive interposer with low thermal conductivity disposed between chips on the interposer and a substrate

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Implementation Method 2

passive and active heat spreaders for temperature control

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4621844A1Interposer for thermally engineered electro-optical multichip modules
Publication Date: 2025.09.24 II VI DELAWARE INC
  • EP4621844A1 patent drawingFigure 1
  • EP4621844A1 patent drawingFigure 2
  • EP4621844A1 patent drawingFigure 3

AI summary

A multi-chip-module includes, from a bottom to a top thereof, a substrate and an interposer disposed on the substrate. The interposer is electrically non-conductive and has a thermal conductivity (k) of k < 20 W/(mK). A set of integrated circuit components or chips is disposed on the interposer. Each of a first subset of the set of the components or chips includes a passive heat spreader disposed on the chip. At least one chip of a second subset of the components or chips includes an active heat spreader disposed on the chip. The first and second sets of the components or chips have no components or chips in common. A common thermal interface is disposed on each passive heat spreader and each active heat spreader.