Low-Dimensional Vector Encoding for Tiny Device Inference
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Solution Overview
Problem
Legacy hyperdimensional computing (HDC) classifiers face challenges due to their heuristic training process and ultra-high dimensionality, leading to suboptimal inference accuracy and large model sizes, making them unsuitable for tiny devices with resource constraints.
Innovation Solution
The introduction of low-dimensional computing (LDC) classifiers, which map the inference process into a neural network with optimized low-dimensional vectors, using a principled training approach to reduce model size and improve accuracy, implemented on tiny devices with limited resources such as field-programmable gate arrays (FPGAs).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If legacy hyperdimensional computing (HDC) classifiers are used, then model coverage is achieved, but inference accuracy is suboptimal and model size is large
Solution Approach 1:
The patent changes the dimensional parameter of hyperdimensional vectors from ultra-high dimension (e.g., 8192 dimensions) to low dimension (e.g., 8-64 dimensions). This parameter transformation enables the system to achieve high inference accuracy while dramatically reducing model size, making it suitable for resource-constrained tiny devices. The low-dimensional vectors maintain sufficient representational capacity through optimized encoding schemes.
Solution Approach 2:
The patent extracts and removes unnecessary computational complexity and redundant dimensions from the traditional HDC classifier. By taking out the ultra-high dimensional space requirement and replacing it with compact low-dimensional representations, the system achieves the same classification functionality with significantly reduced model size and improved accuracy on tiny devices.
2Productivity
If legacy HDC classifiers are used, then classification functionality is provided, but latency and energy consumption are high
Solution Approach 1:
By transforming the dimensional parameter from ultra-high to low, the computational complexity of matrix operations is dramatically reduced. Low-dimensional vectors require fewer floating-point operations for similarity calculations, directly reducing inference latency and energy consumption while maintaining classification functionality on resource-constrained devices.
3Adaptability or versatility
If ultra-high dimensional vectors are used, then representation capacity is achieved, but device resource requirements exceed tiny device capabilities
Solution Approach 1:
The patent transforms the dimensional parameter to enable deployment on tiny devices. Low-dimensional vectors (e.g., 8-64 dimensions compared to 8192+) reduce memory requirements, computational load, and power consumption, making the classifier compatible with resource-constrained embedded and IoT devices while maintaining sufficient representational capacity through optimized encoding.
Data Source
AI summary
Embodiments determine inference classification for use on tiny devices. A processor is coupled with an item memory configured to store a plurality of binary vectors representing discrete values; a feature memory configured to store a plurality of binary vectors for instances of binary code; and an associate memory configured to store a plurality of predefined class vectors. Each of the plurality of discrete values associated with a feature vector are loaded from the item memory and mapped. The value vectors associated with the discrete values are stacked with one or more instances of binary code, such that the stacked dimension of the value vectors matches the dimension of the feature vectors. A matrix multiplication is performed on the stacked vectors to produce a sample vector. A comparison result is generated by comparing the sample vector against the class vectors, and the sample vector is classified based on the comparison results.