Low Energy Ion Implantation for Flowable Oxide Etch Resistance
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Solution Overview
Problem
The use of flowable oxides in semiconductor devices leads to high etch rates and narrow process windows due to unintended etching, which can result in reduced isolation and poor device performance, especially in finFET and GAA devices, and high-energy helium implantation causes collateral damage to adjacent structures.
Innovation Solution
A method involving the use of a low energy ion beam, specifically silicon ions in the range of 100 eV to 500 eV, directed at a heated substrate to form an altered layer within the outer portion of the isolation layer, while avoiding implantation of the inner portion, thereby reducing etch rates and minimizing damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high energy helium implantation is used to reduce etch rate of flowable oxide, then etch resistance is improved, but adjacent semiconductor structures suffer collateral damage
Solution Approach 1:
The patent applies low energy ion implantation (100-500 eV) that modifies only the outer portion of the isolation layer to create an etch-resistant altered layer, while leaving the inner portion and adjacent semiconductor structures unaffected. This localized modification approach selectively enhances etch resistance at the interface most exposed to etchants without damaging underlying fins or other sensitive structures.
Solution Approach 2:
The patent changes the energy parameter of ion implantation from conventional high energy (keV range) to low energy (100-500 eV), and combines it with elevated substrate temperature (400-700°C) to achieve effective etch resistance. This parameter modification allows the ion beam to modify only the outermost oxide layer without penetrating deep enough to damage adjacent semiconductor structures.
2Ease of manufacture
If flowable oxide is used as isolation layer, then gap fill capability is improved, but etch rate becomes too high leading to narrow process windows
Solution Approach 1:
The patent applies low energy ion implantation as a preliminary treatment to the flowable oxide isolation layer before subsequent etching steps. This pre-treatment creates an altered layer with enhanced etch resistance, allowing the flowable oxide to maintain its excellent gap fill properties while becoming resistant to inadvertent etching during device processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances the etch resistance of oxide layers without causing significant damage to semiconductor fins, allowing for the preservation of isolation layers during subsequent processing steps, particularly in finFET and GAA devices, and enables the formation of gate-all-around structures with reduced interdiffusion in SiGe heterostructures.
Implementation Method 1
directing a low energy ion beam to the substrate, when the substrate is heated at a targeted temperature, wherein an altered layer is formed within an outer portion of the isolation layer
Implementation Method 2
when the substrate is heated at a targeted temperature, wherein an altered layer is formed within an outer portion of the isolation layer
Data Source
AI summary
In one embodiment, a method may include providing a substrate, comprising a plurality of surface features, an isolation layer, disposed between the plurality of surface features, and a substrate base, disposed subjacent the isolation layer and the plurality of surface features, wherein the plurality of surface features extend above a surface of the isolation layer. The method may include directing a low energy ion beam to the substrate, when the substrate is heated at a targeted temperature, wherein an altered layer is formed within an outer portion of the isolation layer, and wherein an inner portion of the isolation layer is not implanted.