Low-H Plasma Treatment for Copper Interconnect Adhesion
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Solution Overview
Problem
Current damascene processing techniques for semiconductor devices face issues such as interface adhesion failures, delamination, Cu hillock defects, interlayer dielectric nodules, metal sheet resistance variation, voltage ramped dielectric breakdown, and time-dependent dielectric breakdown, which affect the reliability of memory devices.
Innovation Solution
The method involves performing front-end processing, depositing copper with a copper barrier, annealing in at least 90% N2 with less than 10% H2, planarizing the copper, and forming a low Si—H SiN etch stop layer, followed by back-end processing, including an in-situ low-H NH3 plasma treatment and deposition of a low Si—H SiN etch stop layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional damascene processing techniques are used, then copper interconnections can be formed, but interface adhesion failures and delamination occur
Solution Approach 1:
The patent applies preliminary plasma treatment to the copper surface before depositing the dielectric layer. This preliminary action modifies the copper surface chemistry and topology in advance, creating optimal adhesion conditions that prevent subsequent delamination and interface failures during device operation.
Solution Approach 2:
The patent changes the plasma treatment parameters (gas composition, power, pressure, duration) to optimize the copper surface state. By adjusting these parameters, the surface energy and roughness are controlled to maximize adhesion between copper and the overlying dielectric layer, eliminating adhesion failures.
2Reliability
If copper is used for conductive interconnections, then superior electrical characteristics are achieved, but electro-migration lifetime is degraded due to poor adhesion
Solution Approach 1:
The patent performs preliminary plasma treatment on the copper surface before dielectric deposition. This preliminary action creates a surface state that prevents electron diffusion along the copper-dielectric interface, thereby extending electro-migration lifetime while maintaining copper's superior electrical properties.
3Productivity
If conventional processing is used, then manufacturing can proceed, but Cu hillock defects and interlayer dielectric nodules are formed
Solution Approach 1:
The patent introduces a preliminary plasma treatment step that modifies the copper surface to prevent subsequent defect formation during manufacturing. This preliminary action eliminates Cu hillocks and dielectric nodules without significantly impacting manufacturing throughput, as the plasma treatment is a rapid process.
4Reliability
If copper interconnections are formed, then electrical performance is improved, but voltage ramped dielectric breakdown and time-dependent dielectric breakdown occur
Solution Approach 1:
The patent applies preliminary plasma treatment to the copper surface before dielectric layer deposition. This preliminary action creates a surface state that prevents charge trapping and accumulation at the copper-dielectric interface, thereby preventing both voltage ramped and time-dependent dielectric breakdown while maintaining copper's superior electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of memory devices by improving adhesion, reducing defects, and extending the electro-migration lifetime of copper interconnections, leading to more stable and durable semiconductor structures.
Implementation Method 1
performing an in-situ low-H NH3 plasma treatment
Implementation Method 2
annealing the copper in at least 90% N2 with less than 10% H2
Data Source
AI summary
A method for forming a single damascene and/or dual damascene, contact and interconnect structure, comprising: performing front end processing, depositing copper including a copper barrier, annealing the copper in at least 90% N2 with less than 10% H2, performing planarization, performing in-situ low-H NH3 plasma treatment and low Si—H SiN etch stop layer deposition, and performing remaining back end processing.