Low-IF Receiver Switching to Cut ADC Area and Power

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Solution Overview

Problem

Low-IF receivers require two ADCs for each channel, leading to increased chip area and power consumption, and the existing circuit architecture does not effectively maintain a good image rejection ratio.

Innovation Solution

A transceiver circuit design with a single ADC and a switch module that selects one of two intermediate frequency signals based on signal quality, reducing the need for duplicate circuitry and optimizing power consumption while maintaining image rejection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If two ADCs are used for each channel in a low-IF receiver, then the image rejection ratio is improved, but the chip area and power consumption increase

Engineering Contradiction:
Improveimage rejection ratioVSAvoidchip area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent implements dynamic channel selection where the receiver can switch between using the first ADC for the first channel or the second ADC for the second channel based on signal conditions. This dynamic approach allows the system to maintain high image rejection ratio by using one ADC while saving chip area by not requiring both ADCs to be simultaneously active, thus resolving the contradiction between measurement precision and chip area

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent makes a single ADC capable of serving multiple functions by time-multiplexing it between the first channel and the second channel. The ADC can process signals from either channel depending on which channel has better signal quality, making one ADC universal enough to replace two ADCs while maintaining the image rejection performance that would otherwise require two ADCs

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If two ADCs are used for each channel in a low-IF receiver, then the image rejection ratio is improved, but the power consumption increases

Engineering Contradiction:
Improveimage rejection ratioVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent implements dynamic channel selection where the receiver can switch between using the first ADC for the first channel or the second ADC for the second channel based on signal conditions. This dynamic approach allows the system to maintain high image rejection ratio by using one ADC while saving power consumption by not requiring both ADCs to be simultaneously active, thus resolving the contradiction between measurement precision and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic switching between channels where the system alternates between processing the first channel through the first ADC and the second channel through the second ADC. This periodic action allows the single ADC to handle multiple channels over time, reducing the need for continuous operation of multiple ADCs and thereby lowering overall power consumption while maintaining image rejection performance

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12506503B2Transceiver circuit
Publication Date: 2025.12.23 REALTEK SEMICON CORP
  • US12506503B2 patent drawing
  • US12506503B2 patent drawing
  • US12506503B2 patent drawing

AI summary

The present invention provides a transceiver circuit including receiver circuit, wherein the receiver circuit includes a first mixer, a second mixer, a complex filter, a switch module and an ADC. The first mixer is configured to mix an input signal with a first oscillation signal to generate a first mixed signal. The second mixer is configured to mix the input signal with a second oscillation signal to generate a second mixed signal. The complex filter is configured to generate a first intermediate frequency signal and a second intermediate frequency signal according to the first mixed signal and the second mixed signal. The switch module is configured to select one of the first intermediate frequency signal and the second intermediate frequency signal to serve as an output intermediate frequency signal. The ADC is configured to perform an analog-to-digital conversion operation on the output intermediate frequency signal to generate a digital signal.