Low-Inductance Power Semiconductor Module Design
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Solution Overview
Problem
Existing power semiconductor modules experience overvoltages due to parasitic inductances in the electrical connections between components, which necessitates a low-inductance construction to minimize these issues.
Innovation Solution
A power semiconductor module design featuring a substrate with an insulating material body and a structured conductive layer forming insulated conductor tracks, where power semiconductor components are arranged along a common side relative to DC voltage load current connection elements, and a foil composite with metallic foil layers and an insulating foil layer is used to reduce inductance by closely spacing electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electrical connections with bonding wires and foil composites are used, then the power semiconductor module can be manufactured with standard processes, but parasitic inductances occur leading to overvoltages during operation
Solution Approach 1:
The substrate is divided into multiple electrically insulated conductor tracks, each serving specific current paths. This segmentation allows independent optimization of each track's inductance while maintaining overall module functionality, directly reducing parasitic inductances that cause overvoltages.
Solution Approach 2:
The invention transitions from conventional three-dimensional wire bonding to a planar two-dimensional conductor track layout on the substrate. This dimensional change enables shorter current paths and better control over inductance by arranging conductor tracks in optimized geometric patterns on the substrate surface.
2Reliability
If conductor tracks are arranged to minimize inductance, then overvoltages are reduced, but the manufacturing precision requirements increase
Solution Approach 1:
Multiple conductor tracks and their insulation layers are merged into an integrated substrate structure during manufacturing. This consolidation ensures precise relative positioning of conductor tracks is maintained throughout assembly, reducing the need for high-precision alignment operations and simplifying the manufacturing process while maintaining low-inductance characteristics.
3Volume of moving object
If power semiconductor components are arranged along a lateral direction on a common side, then the inductance is minimized and space is saved, but the DC voltage load current connection elements require compact arrangement
Solution Approach 1:
The DC voltage load current connection elements are arranged in a compact configuration utilizing both lateral and depth dimensions. This multi-dimensional arrangement allows the connection elements to be closely spaced without increasing the module's lateral footprint, accommodating the compact power semiconductor component layout while maintaining electrical performance.
Data Source
AI summary
A power semiconductor module comprising a substrate. The power semiconductor module has first and second DC voltage load current connection elements and first and second power semiconductor components. The first and second power semiconductor components are arranged along a lateral first direction of the substrate. The power semiconductor module has a foil composite having a first metallic foil layer and a structured second metallic foil layer and an electrically insulating foil layer arranged between the first and second metallic foil layers. The first power semiconductor component and the second power semiconductor component are electrically conductively connected to the foil composite and to the substrate. The first and second power semiconductor components are arranged on a common side in relation to the first and second DC voltage load current connection elements. The invention provides a power semiconductor module having a particularly low-inductance construction.