Low-Inductance Power Semiconductor Assembly Layout
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Solution Overview
Problem
Conventional power semiconductor assemblies experience unwanted induction voltage peaks during commutation processes due to stray inductances, which can lead to overvoltages and oscillation phenomena, despite efforts to minimize these inductances.
Innovation Solution
The power semiconductor assembly is designed with bridge branches arranged next to each other in the main current direction, where each power switch has multiple parallel-connected switching elements integrated into a semiconductor chip, and the semiconductor modules are arranged such that the chips are adjacent in a direction perpendicular to the main current direction, reducing transverse inductances and minimizing transient voltage peaks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bridge branches are arranged perpendicular to the main current direction, then ease of manufacture is improved, but transverse inductances increase causing induction voltage peaks
Solution Approach 1:
The patent inverts the conventional arrangement by placing bridge branches in the main current direction instead of perpendicular to it. This reversal of the standard layout eliminates transverse inductances and the associated induction voltage peaks during commutation, directly resolving the harmful effect while maintaining manufacturability through standardized module designs.
Solution Approach 2:
The patent reorganizes the spatial dimension of bridge branch arrangement from a transverse configuration to a longitudinal configuration along the main current direction. This dimensional change in the layout architecture eliminates the formation of transverse inductances that cause voltage peaks, while the modular design maintains ease of manufacture.
2Power
If semiconductor switches are connected in parallel to increase current capacity, then power handling is improved, but asymmetry in current loading occurs due to parasitic inductances
Solution Approach 1:
The patent merges multiple semiconductor switches into integrated power switch modules that are arranged in the main current direction. This consolidation reduces the parasitic inductances between parallel-connected switches and ensures symmetric current distribution, allowing the system to handle higher power while maintaining current loading symmetry through the unified module architecture.
3Ease of manufacture
If conductor tracks and terminal plates are used to interconnect components, then ease of manufacture is improved, but stray inductances are formed causing voltage peaks
Solution Approach 1:
The patent extracts and eliminates the source of stray inductances by removing transverse conductor tracks and terminal plates from the bridge branch interconnections. The design uses direct connections in the main current direction without perpendicular conductors, thereby extracting the harmful inductive elements while maintaining ease of manufacture through simplified interconnection architectures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces transverse inductances, improving coupling between link circuit capacitors and attenuating transient voltage peaks, thereby enhancing the stability and efficiency of the converter operation.
Implementation Method 1
During the commutation, which is required for the operation of the converter, considerable transient current flows in the transverse direction Q and therefore also induction voltage peaks originate from the stray inductances L16, L17, L18 and L19, called transverse inductances
Data Source
AI summary
A low-inductive power semiconductor assembly is provided in which semiconductor switches are arranged behind one another in a main current path.


