Buried Low-k Dielectric Etch Stop for FET Gate Connections
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Solution Overview
Problem
Chemical etching in semiconductor manufacturing often results in excessive material removal and unwanted open circuits in integrated circuit devices due to the lack of precise control over the etching process, particularly in the connections between source/drain and gate components.
Innovation Solution
The use of a low-k dielectric material with high etch selectivity to silicon nitride, acting as an etch stop layer, and a nitride cap material to protect underlying layers during the etching process, ensuring precise material removal and preventing damage to sensitive components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical etching is used to remove material, then material removal is achieved, but excessive material removal and unwanted open circuits occur
Solution Approach 1:
An etch stop layer comprising silicon nitride is formed beforehand between the source/drain and the gate. This preliminary protective layer prevents the etching solution from reaching and damaging critical components during the etching process, thereby resolving the contradiction between achieving material removal and maintaining circuit reliability
Solution Approach 2:
The silicon nitride etch stop layer acts as an intermediary protective barrier between the etching solution and the underlying critical layers. This intermediary layer allows the etching process to proceed while protecting sensitive components, thus improving manufacturing precision without compromising reliability
2Loss of substance
If chemical etching is used, then material removal is achieved, but unwanted open circuits are introduced
Solution Approach 1:
The etch stop layer is deposited in advance using chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD) before the etching process. This preliminary action ensures that critical layers are protected before material removal begins, preventing open circuits while achieving necessary material removal
Solution Approach 2:
The silicon nitride layer serves as a protective intermediary that allows controlled material removal in other areas while preventing etching damage to critical circuit components, thus maintaining circuit integrity during material removal processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces parasitic capacitance and minimizes the formation of open circuits by protecting critical layers from unwanted etching, thereby enhancing the reliability and performance of integrated circuit devices.
Implementation Method 1
a low-k dielectric material with high etch selectivity to silicon nitride, acting as an etch stop layer
Implementation Method 2
a nitride cap material to protect underlying layers during the etching process
Data Source
AI summary
An apparatus comprising a source or drain of a field effect transistor (FET), a first dielectric between a portion of the source or drain and a FET gate, the first dielectric comprising silicon nitride, and a second dielectric above at least a portion of the first dielectric, the second dielectric comprising silicon oxide doped with at least one of oxygen or carbon, the second dielectric having a dielectric constant lower than the first dielectric.