Low-k Gate Spacer Material for Faster Semiconductor Switching

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Solution Overview

Problem

As semiconductor devices are scaled to smaller sizes, the fixed dielectric constant of existing dielectric materials, such as silicon nitride sidewall spacers, increases parasitic capacitance, reducing transistor switching speed and necessitating the use of low-k dielectric materials for improved performance.

Innovation Solution

A method for forming a semiconductor device involves creating a first dielectric layer with an adjustable low dielectric constant by doping silicon oxycarbonitride or silicon oxycarbide with fluorine through molecular ion implantation, which is disposed between the gate structure and the interlayer dielectric layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thin dielectric layer such as an oxide side wall is disposed between a gate electrode and an interlayer dielectric layer, then the dielectric layer provides electrical isolation, but the fixed dielectric constant value increases parasitic capacitance and reduces transistor switching speed

Engineering Contradiction:
Improveelectrical isolationVSAvoidtransistor switching speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies parameter changes by doping silicon oxycarbonitride or silicon oxycarbide with fluorine through molecular ion implantation to reduce the dielectric constant from fixed values (k=4 for oxide, k=7-8 for nitride) to adjustable low-k values in the range of 2.0-3.5. This enables tailoring the dielectric constant to optimize both electrical isolation and minimize parasitic capacitance for faster switching speeds.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite materials by creating fluorine-doped silicon oxycarbonitride or silicon oxycarbide dielectric layers that combine the base dielectric material with fluorine dopants. This composite approach achieves low dielectric constant values while maintaining the necessary electrical isolation properties, resolving the contradiction between isolation reliability and switching speed.

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If existing dielectric materials such as silicon nitride sidewall spacers are used, then the dielectric layer provides stable electrical isolation, but the fixed dielectric constant cannot be changed once formed, limiting performance optimization

Engineering Contradiction:
Improvedielectric constant stabilityVSAvoiddielectric constant adjustability
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by making the dielectric constant adjustable rather than fixed. Through fluorine doping of silicon oxycarbonitride or silicon oxycarbide, the dielectric constant can be dynamically tuned to different values (k=2.0-3.5) depending on performance requirements, enabling optimization for different device configurations and performance targets.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the dielectric constant parameter from fixed to variable by introducing fluorine doping. The dielectric constant can be adjusted within the range of 2.0-3.5 by controlling fluorine concentration, providing versatility for different application requirements while maintaining stable electrical isolation properties.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If device dimensions are scaled to smaller sizes, then transistor density and integration are improved, but parasitic capacitance from dielectric layers becomes more significant, reducing switching performance

Engineering Contradiction:
Improvedevice integration densityVSAvoidtransistor switching speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent addresses scaling challenges by changing the dielectric constant parameter to low-k values (2.0-3.5) through fluorine doping. This reduces parasitic capacitance that becomes more significant at smaller dimensions, maintaining switching speed performance while enabling higher integration density.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite fluorine-doped silicon oxycarbonitride or silicon oxycarbide materials to achieve low dielectric constant values that scale well with device miniaturization. The composite structure maintains stable electrical isolation while minimizing parasitic effects that limit switching speed in scaled devices.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of fluorine-doped silicon oxycarbonitride or silicon oxycarbide as the first dielectric layer reduces parasitic capacitance, enhances transistor switching speed, and provides manufacturing flexibility by allowing the dielectric constant to be tailored.

Implementation Method 1

doping silicon oxycarbonitride or silicon oxycarbide with fluorine through molecular ion implantation

Methodology Applied
Scientific EffectMolecular ion implantation: Ion Implantation

Data Source

PatentUS12349449B2Method for forming semiconductor device and resulting device
Publication Date: 2025.07.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12349449B2 patent drawing
  • US12349449B2 patent drawing
  • US12349449B2 patent drawing

AI summary

A semiconductor device includes: at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a conductive material; and a first dielectric layer disposed along one or more side wall of the at least one gate structure, the first dielectric layer comprising fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide.