Low-k Interconnect Formation Using Removable Passivation Layers
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Solution Overview
Problem
Low dielectric constant layers in semiconductor manufacturing are susceptible to process-induced damage during interconnect structure fabrication, leading to undesired shifts in dielectric constants.
Innovation Solution
A method involving forming trenches in a conductive layer, depositing a passivation layer to seal the conductive elements, transferring the substrate to another system, and removing the passivation layer before filling the trenches with a low dielectric constant layer to minimize damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If low dielectric constant material is deposited directly in the same processing system where trenches are formed, then manufacturing efficiency is improved, but process-induced damage occurs causing dielectric constant shift
Solution Approach 1:
The manufacturing process is divided into two separate segments: a first processing system forms trenches and a second processing system deposits the low-k material. This segmentation isolates the sensitive deposition process from the potentially damaging trench formation processes, preventing dielectric constant shift while maintaining overall manufacturing efficiency through parallel processing capabilities.
Solution Approach 2:
A passivation layer is introduced as an intermediary protective barrier during trench formation. This passivation layer protects the trench structures from damage during subsequent processing steps, and is later removed to allow low-k material deposition. The passivation layer acts as a mediator that enables aggressive processing while protecting sensitive structures.
2Manufacturing precision
If aggressive etching processes are used to form trenches, then manufacturing precision is improved, but process-induced damage to low-k material occurs
Solution Approach 1:
The trenches are formed with precise dimensions and profiles in the first processing system before the low-k material deposition. By completing the precise trench formation beforehand, the sensitive low-k material is not exposed to aggressive etching processes, eliminating the harmful effects while maintaining manufacturing precision.
Solution Approach 2:
The passivation layer serves as a protective intermediary during trench formation and processing. It shields the underlying structures from process-induced damage while allowing precise trench formation to occur, and is subsequently removed to enable low-k material deposition without damage.
3Device complexity
If multiple processing steps are performed in sequence in the same system, then device complexity is reduced, but reliability of low-k layer decreases due to cumulative damage
Solution Approach 1:
The processing system is segmented into two independent systems: the first system handles trench formation and the second system handles low-k material deposition. This segmentation eliminates cumulative process-induced damage to the low-k layer, ensuring its integrity and reliability, while the modular design maintains overall device complexity at acceptable levels.
Solution Approach 2:
The passivation layer acts as a protective intermediary throughout the processing sequence, shielding sensitive structures from damage during multiple processing steps. This enables complex multi-step processing to occur reliably, with the passivation layer being removed only after it has served its protective function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables the formation of interconnect structures with low dielectric constant layers that are free from process-induced damage, maintaining the desired dielectric constant values.
Implementation Method 1
The passivation layer is deposited hermetically on the plurality of trenches and on the plurality of conductive elements thereby sealing the plurality of trenches and the plurality of conductive elements
Implementation Method 2
depositing a low dielectric constant layer directly on the non-planar surface to fill the plurality of trenches with the low dielectric constant layer
Data Source
AI summary
Methods for forming an interconnect structure and semiconductor processing system for forming the interconnect structure are disclosed. The methods disclosed include forming conductive elements in a conductive layer and forming a passivation layer over the conductive elements. The methods disclosed also include removing the passivation layer prior to forming a low dielectric constant layer in the trenches to prevent process induced damage in the low dielectric constant layer. The semiconductor processing systems disclosed include first, second, and third reaction chamber as well a transfer module for forming an interconnect structure.