Low-k Dielectric Protective Layer to Prevent Sharp Etch Corners
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the formation of 'sharp corner' profiles on low dielectric constant material layers after etching, which leads to parasitic capacitance and processing issues, requiring additional oxide layer deposition and increased complexity.
Innovation Solution
A protective layer with a lower carbon content, formed from the same precursor as the low dielectric constant material layer, is deposited in the same reaction chamber, using cyclic organosiloxanes and oxygen-containing gases to prevent 'sharp corner' formation and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a low dielectric constant material is used as interlayer dielectric to reduce parasitic capacitance, then the response speed of semiconductor device is improved, but a sharp corner profile appears on the material surface after etching
Solution Approach 1:
An oxide layer is grown on the surface of the low dielectric constant material before etching to protect it from forming sharp corners during the subsequent etching process. This preliminary protective action prevents the harmful shape change while allowing the low dielectric constant material to function in reducing parasitic capacitance and improving response speed.
2Reliability
If an oxide layer is grown on the low dielectric constant material to protect from sharp corner profile, then process stability is improved, but additional processing steps and complexity are introduced
Solution Approach 1:
The oxide layer formation and low dielectric constant material deposition are combined into a single atomic layer deposition process using the same reaction chamber. By adjusting reaction parameters (oxygen flow rate, temperature, precursor flow rate), the process transitions between forming low dielectric constant material and forming protective oxide layer, eliminating the need for separate processing steps and reducing overall process complexity.
3Reliability
If additional oxide layer deposition is performed to protect low dielectric constant material, then process integration is facilitated, but processing time is increased
Solution Approach 1:
The atomic layer deposition process operates continuously within a single reaction chamber, transitioning between depositing low dielectric constant material and forming protective oxide layer by adjusting reaction parameters. This continuous process eliminates idle transfer time and maintains productive action throughout, reducing total processing time while achieving the same protective function.
4Ease of manufacture
If the low dielectric constant material is etched to form metal line structures, then the interlayer dielectric function is achieved, but parasitic capacitance increases due to sharp corner formation
Solution Approach 1:
The oxide layer is formed on the low dielectric constant material surface before etching to counteract the formation of sharp corners during etching. This preliminary protective action prevents the generation of harmful electric field concentrations at sharp corners, thereby reducing parasitic capacitance while still allowing metal line structures to be formed through etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates the need for transferring the semiconductor structure, reduces processing time and costs, and enhances process efficiency by protecting the low dielectric constant material layer's surface, thereby improving the semiconductor's response speed and reliability.
Implementation Method 1
a low dielectric constant material layer is formed by the first reaction gas and the second reaction gas on the target structure. The first technological condition is adjusted to a second technological condition, and a protective layer is formed by the first reaction gas and the second reaction gas on the low dielectric constant material layer
Data Source
AI summary
Provided are a semiconductor structure and a method for manufacturing same. The semiconductor structure includes a target structure, a low dielectric constant material layer disposed on the target structure, and a protective layer disposed on the low dielectric constant material layer. The low dielectric constant material layer and the protective layer are prepared from the same precursor, and the protective layer has a lower carbon content.