Low-k Dielectric Via Etching With N2/Ar Polymer Removal
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Solution Overview
Problem
The increasing parasitic capacitance between metal interconnects in high-density integrated circuits leads to RC delay and cross talk, which is not effectively addressed by existing low-k dielectric materials and processing techniques.
Innovation Solution
A multiple patterning method is employed to form metal lines and vias, involving the use of nitrogen and argon plasma to remove polymer residues from the etching process, thereby reducing parasitic capacitance and improving conduction speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If low-k dielectric materials are employed to reduce parasitic capacitance, then conduction speed between metal interconnections is improved, but polymer residues remain from the etching process which can cause defects
Solution Approach 1:
A polymer removal treatment is performed before via opening formation to eliminate polymer residues in advance. This preliminary action prevents polymer contamination during subsequent etching and filling processes, ensuring clean via openings while maintaining the low-k dielectric structure's integrity for high-speed conduction
Solution Approach 2:
The patent applies specific treatment parameters including nitrogen flow rate (10-500 sccm), argon flow rate (10-500 sccm), pressure (10-100 mTorr), and temperature (20-80°C) to optimize polymer removal. By carefully controlling these parameters, the treatment effectively removes polymer residues while preserving the low-k dielectric material properties needed for reduced parasitic capacitance and improved conduction speed
2Manufacturing precision
If multiple patterning methods are used to form metal lines and vias, then via opening filling is improved, but process complexity increases
Solution Approach 1:
The via formation process is segmented into distinct steps: polymer removal treatment, via opening etch, and via filling. This segmentation allows each step to be optimized independently, with the polymer removal step preparing clean surfaces for subsequent etching and filling operations, thereby improving via opening filling quality without requiring overly complex integrated processes
Solution Approach 2:
The polymer removal treatment using nitrogen and argon plasma acts as an intermediary step between dielectric layer preparation and via formation. This intermediary treatment cleans the surface and removes polymer residues, creating optimal conditions for subsequent etching and filling processes, thereby improving overall via opening filling without adding excessive complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively removes polymer residues and minimizes kink formation in via openings, leading to improved filling of via openings and reduced parasitic capacitance, thus enhancing the performance of integrated circuits.
Implementation Method 1
A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas
Data Source
AI summary
A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.