Low Latency Power Reduction for Overcurrent Protection

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Solution Overview

Problem

Data centers face inefficiencies in power provisioning due to conservative estimates of power consumption, leading to 'stranded' power and potential circuit breaker tripping from overcurrent conditions, with latency in notifications exacerbating the issue.

Innovation Solution

A power system that provides real-time notifications of overcurrent conditions to computing modules, enabling them to reduce operating speed and power consumption within the overcurrent tolerance period, thereby avoiding circuit breaker tripping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conservative power estimates are used for provisioning, then power system reliability is improved, but power efficiency deteriorates due to stranded power

Engineering Contradiction:
Improvepower system reliabilityVSAvoidstranded power
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system implements real-time feedback by monitoring actual power consumption and comparing it against allocated power limits. When overcurrent conditions are detected, the system immediately adjusts computing module speeds to match actual consumption patterns, eliminating stranded power while maintaining reliability through continuous monitoring and dynamic adjustment.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The power provisioning system transitions from static conservative estimates to dynamic real-time allocation. Computing modules can adjust their operating speeds dynamically based on actual power availability and consumption patterns, allowing the system to optimize power efficiency while maintaining reliability through adaptive provisioning rather than fixed conservative limits.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If real-time power monitoring is implemented, then power efficiency is improved, but system complexity increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidsystem complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The power monitoring and control framework is designed to work across multiple computing modules and power delivery systems uniformly. The same monitoring mechanisms and control protocols apply across different hardware platforms, reducing the need for platform-specific complex implementations while maintaining high power efficiency through standardized real-time monitoring.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Computing modules autonomously monitor their own power consumption and adjust their operating speeds without requiring constant external intervention. The self-service capability reduces system complexity by eliminating the need for complex centralized control mechanisms while maintaining real-time power efficiency through distributed self-regulation.

Inventive Principle:
Principle #25Self-service

3Loss of time

If computing modules reduce operating speed rapidly, then response time to overcurrent conditions is improved, but computational throughput decreases

Engineering Contradiction:
Improveresponse timeVSAvoidcomputational throughput
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

Instead of immediately reducing computing speed to minimum levels, the system applies partial action by adjusting speeds to just the extent necessary to prevent overcurrent conditions. Modules operate at reduced but functional speeds during transient conditions, minimizing throughput loss while achieving adequate response time. The system avoids excessive action that would cause unnecessary computational slowdown.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system performs preliminary monitoring and detection of overcurrent conditions before they cause damage. By detecting conditions early and taking preliminary speed adjustment actions, the system prevents severe throughput losses that would occur if waiting for critical conditions to manifest. This advance action allows smoother transitions and reduces the impact on computational throughput.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10528113B2Low latency computer system power reduction
Publication Date: 2020.01.07 MICROSOFT TECHNOLOGY LICENSING LLC
  • US10528113B2 patent drawing
  • US10528113B2 patent drawing
  • US10528113B2 patent drawing

AI summary

Technology for handling overcurrent conditions on electrical circuits that power multiple computing modules is disclosed. Aspects of the technology include a power system adapted to provide notifications of overcurrent conditions, and computing modules adapted to reduce an operating speed thereof in response to notification of an overcurrent condition.