Low Leakage Switch Control Circuit for USB Compliance
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Solution Overview
Problem
Existing low leakage PMOS switches experience leakage issues when the voltage at the pin is greater than the supply voltage, leading to sub-threshold regions and potential back-current, which can cause system errors and non-compliance with USB standards.
Innovation Solution
A control circuit comprising a comparison circuit to determine the greater voltage between the supply and pin voltages, a latching circuit to bias the gate and bulk region, and a shorting circuit to control the bulk region voltage, ensuring zero leakage current, using PMOS transistors and resistors for electrostatic discharge protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PMOS switch is used to connect the pin to the supply, then the switch can be controlled to connect or disconnect the pin, but leakage current flows from the pin to the supply when the pin voltage exceeds the supply voltage
Solution Approach 1:
The patent changes the voltage parameter of the bulk region dynamically. When the pin voltage exceeds the supply voltage, the bulk region voltage is adjusted to be equal to the pin voltage, creating a zero voltage difference that prevents leakage current. This parameter change resolves the contradiction by adapting the bulk voltage to the pin voltage condition.
Solution Approach 2:
The patent introduces a control circuit as an intermediary between the pin and the supply. This control circuit includes a comparison circuit that detects voltage conditions and a latching circuit that controls the bulk region voltage accordingly. The intermediary prevents direct harmful interaction by mediating the voltage relationship.
2Ease of operation
If the bulk region is connected to the supply to ensure proper PMOS operation, then the switch functions normally, but leakage current occurs when Vpin > Vsupply
Solution Approach 1:
The patent makes the bulk region voltage dynamic rather than static. The latching circuit responds to voltage conditions by adjusting the bulk voltage: connecting to supply when Vpin ≤ Vsupply for normal operation, and connecting to pin when Vpin > Vsupply to prevent leakage. This dynamic adaptation resolves the contradiction between normal functionality and leakage prevention.
Solution Approach 2:
The bulk voltage parameter is changed based on operating conditions. The comparison circuit detects when Vpin exceeds Vsupply and triggers the latching circuit to change the bulk voltage from supply level to pin level, eliminating the voltage difference that causes leakage while maintaining switch functionality.
3Reliability
If a control circuit is added to prevent leakage, then leakage current is eliminated, but the circuit complexity increases
Solution Approach 1:
The patent merges the comparison function and latching control into an integrated control circuit that works with the existing PMOS switch. The control circuit uses the existing supply and pin voltage nodes, combining leakage prevention functionality with the original switch operation without requiring entirely separate control mechanisms.
Solution Approach 2:
The control circuit is self-regulating through feedback. The comparison circuit continuously monitors the voltage relationship between pin and supply, and the latching circuit automatically adjusts the bulk voltage in response. This self-service mechanism eliminates leakage without requiring external complex control systems.
Data Source
AI summary
A low-leakage circuit including a switch having an input node, gate, bulk region, and pin node, a comparison circuit configured to determine and output a greater of two voltages of the switch, a latching circuit connected to the comparison circuit and configured to bias the gate and the bulk region of the switch using the greater of the two voltages, and a shorting circuit configured to control a voltage at the bulk region to ensure that no leakage current flows from the pin node.