Low-Light Imaging Pixel Circuit With Avalanche Charge Multiplication
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Solution Overview
Problem
Current imaging devices face challenges in achieving high-resolution imaging under low illuminance conditions due to reduced pixel area, which decreases light sensitivity and makes it difficult to perform imaging effectively.
Innovation Solution
The development of an imaging device that incorporates a specific transistor structure, including oxide semiconductors and silicon transistors, which allows for high light detection sensitivity under low illuminance by using a photoelectric conversion element with avalanche charge multiplication and high voltage power supply, along with transistors that can withstand high voltage, enabling efficient signal output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pixel area is reduced to achieve high integration, then the integration degree is improved, but the light sensitivity deteriorates
Solution Approach 1:
The patent changes the material parameter of the transistor from conventional semiconductor to oxide semiconductor, which has fundamentally different electrical characteristics including extremely low off-state current. This material parameter change allows the transistor to maintain low leakage current even in highly integrated pixels with reduced area, thereby preserving light sensitivity while achieving high integration degree.
Solution Approach 2:
The patent employs a hybrid transistor structure combining oxide semiconductor transistors (for low off-state current characteristics) with silicon-based transistors (for high-speed operation). This composite approach leverages the complementary strengths of different semiconductor materials to simultaneously achieve high integration and maintain light sensitivity in low illuminance conditions.
2Reliability
If oxide semiconductor transistors are used to reduce off-state current, then the off-state current is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent divides the imaging device into two functional segments: pixels using oxide semiconductor transistors for low off-state current performance, and peripheral circuits using silicon-based transistors for high-speed operation. This segmentation allows each region to be optimized independently, managing manufacturing complexity while achieving the desired low off-state current characteristics in the pixel array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The imaging device achieves high light detection sensitivity and fast operation, allowing for high-resolution imaging even in low light conditions with reduced noise and extended dynamic range, while maintaining reliability across a wide temperature range.
Implementation Method 1
a photoelectric conversion element, where one electrode of the photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of the first transistor
Implementation Method 2
One embodiment of the present invention relates to an imaging device including an oxide semiconductor. Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method.
Data Source
AI summary
A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.