Circuit Board Through-Electrode Structure for 5G Signal Integrity
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Solution Overview
Problem
Existing circuit boards face challenges in forming fine through holes and through electrodes due to limitations in reducing the dielectric constant, leading to increased signal transmission loss and difficulty in miniaturization for high-frequency applications, particularly in 5G technology.
Innovation Solution
The circuit board employs an insulating layer made of RCC or prepreg with a dielectric constant between 2.0 and 3.0, allowing for the formation of a through electrode with controlled width variations and reduced thickness, achieved by preferential removal of copper foil layers and laser processing to form precise through holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the dielectric constant is reduced to enable miniaturization, then the through hole size can be reduced, but signal transmission loss increases
Solution Approach 1:
The patent changes the dielectric constant parameter of the insulating layer to a specific range (2.0 ≤ Dk ≤ 3.0) to optimize both the through hole size and signal transmission characteristics, resolving the contradiction between miniaturization and signal loss
Solution Approach 2:
The patent uses composite material structures including RCC or prepreg insulating layers combined with specific metal layer configurations (first and second metal layers with controlled thicknesses) to achieve both small through hole dimensions and low signal transmission loss
2Manufacturing precision
If the insulating layer dielectric constant is reduced, then fine through holes can be formed, but manufacturing difficulty increases
Solution Approach 1:
The patent specifies a controlled dielectric constant range (2.0 ≤ Dk ≤ 3.0) for the insulating layer that enables fine through hole formation while maintaining manufacturability, avoiding the extremes that would make manufacturing difficult
Solution Approach 2:
The patent applies preliminary treatments to the insulating layer surface before through hole formation, including copper foil layer removal and surface roughening, to facilitate easier and more precise through hole drilling at fine dimensions
3Length of stationary object
If the circuit board thickness is reduced, then board slimness is achieved, but through electrode width control becomes more difficult
Solution Approach 1:
The patent controls the thickness parameters of individual layers (insulating layer, metal layers) within specific ranges to achieve overall board slimness while maintaining adequate through electrode width control through the layered structure
Solution Approach 2:
The patent divides the through electrode into multiple segments (first metal layer and second metal layer) with different thicknesses and positions, allowing independent optimization of each layer to control overall width while achieving thin board profile
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of a circuit board with reduced signal transmission loss, enabling application in 5G products by minimizing the thickness and width deviations of through electrodes, thus enhancing signal integrity and board slimness.
Implementation Method 1
laser processing to form precise through holes
Data Source
AI summary
A circuit board according to an embodiment includes a first pad; an insulating layer disposed on the first pad; a second pad disposed on the insulating layer; and a through electrode formed in a through hole passing through the insulating layer and connecting the first pad and the second pad, wherein the through electrode includes a first metal layer formed on an inner wall of the through hole; and a second metal layer formed on the first metal layer and filling the through hole, the first pad is in contact with a lower surface of the through electrode and has a thickness in a range of 1.0 μm to 12 μm, and the second pad includes a third metal layer extending from the first metal layer; and a fourth metal layer extending from the second metal layer.