Low-Pass RC Filter Using Inversion for Longer Delay
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Solution Overview
Problem
Conventional low pass RC filters face limitations in achieving increased delay times with given resistor and capacitance values, leading to large component sizes and inefficiencies in filtering pulses shorter than the delay time.
Innovation Solution
The proposed low pass filter incorporates an additional inverting gate and a delay adjusting mechanism, allowing the capacitive element to charge and discharge between different voltage levels, effectively doubling the delay time by reversing the capacitor's polarity and using a NAND gate to control the enable signal, and utilizing equivalent capacitors in parallel to adjust capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If the resistance R and capacitance C values are increased to achieve longer delay time, then the delay time increases, but the component size and area occupied increase
Solution Approach 1:
The patent applies parameter changes by utilizing voltage level transitions instead of relying solely on increasing R and C values. The capacitor charges and discharges between different voltage levels (0V to +V, then +V to -V), effectively doubling the delay time for the same component values. This changes the operational parameters of the filter to achieve longer delay without increasing component size.
2Duration of action of moving object
If the resistance R and capacitance C values are increased to achieve longer delay time, then the delay time increases, but the filtering effectiveness for short pulses deteriorates
Solution Approach 1:
The patent changes the voltage transition parameters to improve pulse filtering. By having the capacitor switch between 0V to +V and then +V to -V, the filter creates a more pronounced delay effect that reliably filters short pulses while maintaining the same component values, thus improving reliability without sacrificing delay time.
3Device complexity
If conventional RC filter configuration is used, then the circuit is simple, but the delay time is limited by component size
Solution Approach 1:
The patent applies inversion by reversing the traditional approach: instead of increasing component size to get longer delay, it inverts the strategy by using active voltage level switching to multiply the delay effect. The capacitor is charged to +V and then discharged to -V, effectively doubling the delay time while keeping the circuit configuration relatively simple and component sizes small.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for increased delay times with reduced component sizes, enabling more efficient filtering of shorter pulses and providing flexibility in delay settings by adjusting the voltage supply and capacitor configuration.
Implementation Method 1
The capacitor C gradually charges through resistor R at a rate according to a time constant τ (tau). Likewise, if the signal at node N1 is at a low voltage value (grounded), the capacitor C gradually discharges through resistor R according to the same time constant. The time constant is the product of resistance R and capacitance C, such that one time constant τ is equal to the amount of time the capacitor takes to reach 63% of the supply voltage +V.
Implementation Method 2
For the sake of simplicity, it is assumed in the following that the switching time of the inverting gates IG1, IG2 is instantaneous, and that the switching point of inverting gate IG2 is equal to +V/2.
Data Source
AI summary
A low pass filter comprises a filter input node configured to receive a first logic signal, a filter output node configured to supply a second logic signal, a resistive element comprising a first terminal coupled to the input node and a second terminal coupled to the output node, and a capacitive element comprising a first terminal coupled to the output node and a second terminal. The filter further comprises an inverting gate having a first terminal coupled to the input node and a second terminal coupled to the second terminal of the capacitive element.