Low-Pass Filter With Dynamic Biasing For Ultra-Low Corner Frequency
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Solution Overview
Problem
Existing low-pass filters for low-dropout regulators face challenges in achieving ultra-low corner frequencies without generating excessive noise or consuming high current, and they often require significant silicon area or modify the reference voltage.
Innovation Solution
A low-pass filter design that uses a filter FET and a bias FET with different threshold voltages, along with a buffer to source bias current independently of the reference voltage, allowing the filter FET to operate in a high-ohmic state with a filter capacitor, thereby minimizing current flow and maintaining reference voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a low-pass filter uses a filter FET with high resistance to achieve ultra-low corner frequency, then noise is reduced, but current consumption increases and silicon area expands
Solution Approach 1:
The filter FET resistance is dynamically controlled by a bias voltage applied to its gate terminal. The bias FET adjusts the filter FET's resistance based on the output voltage of the buffer, enabling the resistance to adapt rather than being fixed. This dynamic control allows achieving ultra-low corner frequencies with lower current consumption compared to static high-resistance designs.
Solution Approach 2:
The invention changes the resistance parameter of the filter FET by applying different bias voltages. The bias FET, controlled by the buffer output, modulates the filter FET's channel resistance. This parameter change enables the filter to achieve very high effective resistance (low corner frequency) without requiring permanently high current consumption or large device dimensions.
2Object-affected harmful factors
If a low-pass filter uses a filter FET with high resistance to achieve ultra-low corner frequency, then noise is reduced, but silicon area increases
Solution Approach 1:
The filter FET resistance is dynamically controlled by a bias voltage applied to its gate terminal. The bias FET adjusts the filter FET's resistance based on the output voltage of the buffer, enabling the resistance to adapt rather than being fixed. This dynamic control allows achieving ultra-low corner frequencies with smaller silicon area compared to static high-resistance designs that would require physically large resistors or capacitors.
Solution Approach 2:
The invention changes the resistance parameter of the filter FET by applying different bias voltages. The bias FET, controlled by the buffer output, modulates the filter FET's channel resistance. This parameter change enables the filter to achieve very high effective resistance (low corner frequency) without requiring permanently large device dimensions or additional silicon area for passive components.
3Reliability
If bias current is delivered directly by a reference voltage source, then the filter operates correctly, but the reference voltage is modified (DC-shift)
Solution Approach 1:
The buffer acts as an intermediary between the reference voltage source and the bias FET. Instead of connecting the bias FET directly to the reference voltage source, the buffer is inserted in between. The buffer sources the bias current for the bias FET while its output drives the bias FET gate, preventing direct loading of the reference voltage source and thus avoiding DC-shfts.
Solution Approach 2:
The buffer independently sources the bias current for the bias FET without requiring current to be drawn from the reference voltage source. The buffer's internal circuitry generates and supplies the necessary bias current, making the reference voltage source self-sufficient for its primary function of providing a stable reference voltage without being burdened by additional current loading effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a low noise level with a sub-Hz corner frequency while maintaining a small silicon area and avoiding unwanted DC-shifts in the output voltage, making it suitable for low-noise applications like audio systems.
Implementation Method 1
a filter FET configured to provide a resistance between the filter input terminal and the filter output terminal
Implementation Method 2
a filter capacitor connected between the filter output terminal and a reference terminal
Implementation Method 3
a bias FET configured to provide a bias voltage to the filter FET; a bias FET conduction channel between a first bias FET conduction terminal and a second bias FET conduction terminal
Data Source
AI summary
A low-pass filter comprising: a filter input terminal; a filter output terminal; a filter FET configured to provide a resistance between the filter input terminal and the filter output terminal; a filter capacitor connected between the filter output terminal and a reference terminal; a bias FET configured to provide a bias voltage to the filter FET; a buffer connected between the filter input terminal and the bias FET, the buffer configured to source a bias current for the bias FET; and an offset voltage source configured to contribute to the bias voltage provided to the filter FET.