Low-Pass Filter Power-Down Switches for Leakage Control

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Solution Overview

Problem

Noise filters in RF receivers suffer from significant leakage currents due to power-down switches, leading to voltage drops that affect signal integrity.

Innovation Solution

Incorporating a series connection of transistors with controlled gate terminals to form a power-down circuit that minimizes leakage current when switched off, using NMOS or PMOS transistors with appropriate threshold voltages to ensure minimal current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power-down switches are used in noise filters, then power consumption is reduced during power-down modes, but leakage current increases causing voltage drops

Engineering Contradiction:
Improvepower consumptionVSAvoidleakage current
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The power-down switch is segmented into two separate transistors connected in series, where the first transistor handles the main switching function and the second transistor specifically addresses leakage current. This segmentation allows each transistor to be optimized for its specific function, with the second transistor acting as a leakage blocker that maintains near-zero current flow during power-down modes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second transistor acts as an intermediary element between the filter output and ground, specifically designed to block leakage current while allowing the first transistor to perform the main power-down switching function. This intermediary structure enables the system to achieve both low power consumption and minimal leakage current.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If large resistance values are used in filters, then noise filtering performance is improved, but voltage drops due to leakage current worsen

Engineering Contradiction:
ImprovenoiseVSAvoidvoltage drop
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful effect of leakage current into a beneficial structure by using the second transistor to actively block and control the leakage path. This transforms the problem of leakage current into an opportunity to implement a dedicated leakage blocking mechanism that protects the high-value filter resistors from voltage drops while maintaining their noise filtering performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Device complexity

If single transistor power-down switches are used, then device complexity is low, but leakage current control is insufficient

Engineering Contradiction:
Improveswitch structureVSAvoidleakage current control
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The power-down switch function is segmented into two transistors with distinct roles: the first transistor provides the main switching capability with simple control, while the second transistor specifically handles leakage current blocking. This segmentation achieves superior leakage control with minimal increase in device complexity, as both transistors can be integrated into the existing circuit layout.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12562729B2Filter with low leakage power-down switches
Publication Date: 2026.02.24 INFINEON TECHNOLOGIES AG
  • US12562729B2 patent drawing
  • US12562729B2 patent drawing
  • US12562729B2 patent drawing

AI summary

A circuit includes: a low-pass filter that includes a resistor coupled between a first node and a second node, and a capacitor coupled between the second node and a reference node. The circuit further includes: a first transistor, where a drain terminal of the first transistor is coupled to the second node, and a source terminal of the first transistor is coupled to the first node; and a second transistor, where a drain terminal of the second transistor is coupled to the first node, and a source terminal of the second transistor is coupled to the reference node, where a gate terminal of the first transistor and a gate terminal of the second transistor are coupled to a control node.