Low-Power Analog Decision Feedback Equalizer for Post-Cursor Cancellation

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Solution Overview

Problem

Existing serial link communication technologies face challenges in achieving efficient data transmission at high data rates with varying equalization implementations, leading to errors and noise due to insufficient or excessive equalization, particularly in low supply voltage environments.

Innovation Solution

Implementing a low-power analog decision feedback equalizer (DFE) in the receiver frontend using passive analog components to cancel post-cursor outputs, employing inverters and resistors-capacitors combinations for bandpass filtering, which operates without a clock and maintains high data rates with reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If digital signal processing is implemented for equalization, then data transmission reliability is improved, but power consumption increases and operation at low supply voltage becomes difficult

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces digital signal processing circuits with an analog decision feedback equalizer that uses passive RC components and transistors to perform equalization functions. This substitution of analog circuitry for digital processing significantly reduces power consumption while maintaining equalization effectiveness, enabling operation at low supply voltages of 1.0V or less.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The analog DFE circuit performs equalization using the inherent characteristics of passive RC components and transistor behavior, without requiring external power-intensive digital processing units. The circuit self-regulates the equalization process through its analog feedback mechanism, eliminating the need for high-power digital signal processors.

Inventive Principle:
Principle #25Self-service

2Reliability

If more equalization is provided, then data transmission errors are reduced, but noise is amplified and threatens data transmission

Engineering Contradiction:
Improvedata transmission accuracyVSAvoidnoise amplification
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent implements a decision feedback equalizer that uses feedback from the equalized signal to dynamically adjust and cancel post-cursor interference. The feedback mechanism continuously monitors the output and applies corrective feedback to eliminate intersymbol interference without requiring excessive equalization that would amplify noise.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The analog DFE circuit dynamically adjusts equalization parameters through its feedback mechanism, changing the effective equalization strength based on signal conditions. This allows the system to provide sufficient equalization to reduce errors while automatically preventing over-equalization that would amplify noise, adapting to varying signal quality in real-time.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If high-speed data transmission is achieved, then productivity is improved, but power consumption increases

Engineering Contradiction:
Improvedata transmission rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent achieves high-speed data transmission (32-56 Gbps) using an analog equalizer circuit that operates at low power consumption. By replacing power-intensive digital equalization circuits with efficient analog circuitry based on passive RC components and transistors, the system maintains high data rates while significantly reducing power consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The analog DFE circuit operates continuously at the data transmission rate without requiring high-power periodic digital processing cycles. The continuous analog feedback mechanism processes data at the full transmission rate inherently, eliminating the need for power-intensive periodic digital signal processing operations.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively minimizes inter-symbol interference and noise, enabling high-speed data transmission up to 56 Gbps with low power consumption, while avoiding overcompensation of post-cursors and maintaining signal integrity.

Implementation Method 1

employing inverters and resistors-capacitors combinations for bandpass filtering

Methodology Applied
Scientific EffectBandpass filtering: Filter (electronic)

Implementation Method 2

employing inverters and resistors-capacitors combinations for bandpass filtering

Methodology Applied
Scientific EffectSignal amplification and inversion:

Data Source

PatentUS20250254071A1Low-power analog decision feedback equalizer
Publication Date: 2025.08.07 NVIDIA CORP
  • US20250254071A1 patent drawing
  • US20250254071A1 patent drawing
  • US20250254071A1 patent drawing

AI summary

A communications circuit includes a receiver (RX) frontend coupled to an RX deserializer and the RX frontend includes a decision feedback equalizer coupled directly between an output and an input of the RX frontend. The decision feedback equalizer may include a first inverter and a series combination of a first resistor and a first capacitor coupled in series with the first inverter.