Low Power Physical Layer Driver Topologies for High Speed Interfaces
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed interfaces in electronic devices face limitations due to clock skew and interference, particularly in devices like memory devices that require high data transfer rates, often consuming significant power and real-estate on circuit boards.
Innovation Solution
The implementation of a multi-phase encoding scheme where data is encoded in phase transitions and polarity changes on multiple conductors, allowing for efficient data transfer using a 3-wire, 3-phase system with fewer active drivers, reducing power consumption and interface complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional high-speed interfaces are used to achieve high data transfer rates, then bandwidth and speed are improved, but power consumption and interface complexity increase significantly
Solution Approach 1:
The interface is segmented into multiple independent phases (first phase, second phase, third phase), each handling specific voltage level transitions. This segmentation allows parallel processing of multiple voltage levels without requiring full differential signaling for each, thereby reducing power consumption while maintaining high data transfer rates.
Solution Approach 2:
The patent transitions from traditional single-ended or differential signaling to a multi-phase voltage signaling system that operates in multiple voltage dimensions simultaneously. By encoding data in phase transitions and voltage level changes across multiple phases, the system achieves higher bandwidth without proportionally increasing power consumption.
2Productivity
If traditional high-speed interfaces are used to achieve high data transfer rates, then bandwidth is improved, but interface complexity and circuit board real-estate increase
Solution Approach 1:
Multiple signaling functions are merged into a unified multi-phase voltage signaling system. The first, second, and third phases are combined to simultaneously encode multiple bits of data through their collective voltage level transitions, reducing the number of separate signal lines and interface components needed compared to traditional differential interfaces.
Solution Approach 2:
The multi-phase signaling system serves multiple functions simultaneously: it provides clocking information, data encoding, and voltage level reference through its phase transitions. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby simplifying the overall interface design while maintaining high bandwidth.
3Use of energy by moving object
If multi-phase encoding is implemented to reduce power consumption, then power efficiency is improved, but signal encoding complexity increases
Solution Approach 1:
The patent changes the signaling parameter from traditional voltage polarity (high/low) to multi-phase voltage levels (first, second, third phases with different voltage magnitudes). This parameter change enables more information to be encoded per signal transition, improving power efficiency by reducing the number of transitions needed, while the encoding complexity is managed through systematic phase relationship definitions.
Data Source
AI summary
System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.