Low-Power Microcontroller Segments SoC for AR Power Management
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Solution Overview
Problem
Artificial reality systems face significant power consumption issues due to the need for full SoC operation for user-facing workloads, leading to reduced battery life in wearable devices and smartphones.
Innovation Solution
Integration of a low-power subsystem, or 'mini-SoC,' within the SoC that performs boot, security, and power management functions, allowing for the execution of applications without requiring the full SoC CPU, with features like unique memory organization and access to DRAM without booting the main CPU, enabling efficient power management and extended battery life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the full SoC CPU is used to execute user applications, then application functionality is complete, but power consumption increases significantly
Solution Approach 1:
The patent segments the SoC into two distinct execution environments: a low-power subsystem (min-SoC) for basic applications and the full SoC CPU for complex applications. This segmentation allows the system to use only the necessary processing resources for each task, reducing overall power consumption while maintaining full application functionality when needed.
Solution Approach 2:
The patent implements dynamic transition capabilities between the low-power subsystem and the full SoC CPU. The system can dynamically switch execution environments based on application requirements, transitioning from low-power mode to full-power mode and vice versa, optimizing the balance between functionality and power consumption in real-time.
2Use of energy by moving object
If the low-power subsystem executes applications independently, then power consumption is reduced, but transition time and energy are required to transfer process state
Solution Approach 1:
The patent implements preliminary actions by maintaining process state information in a manner that facilitates quick transfer between execution environments. The low-power subsystem and full SoC CPU share memory structures that allow for efficient state preservation and restoration, reducing the time and energy required for transitions.
Solution Approach 2:
The patent introduces shared memory structures and communication interfaces as intermediaries between the low-power subsystem and the full SoC CPU. These intermediaries facilitate efficient data and state transfer, minimizing the overhead associated with transitions while maintaining independent execution capabilities.
3Adaptability or versatility
If the full SoC is booted for application execution, then complete system functionality is available, but battery life is reduced
Solution Approach 1:
The patent segments system functionality between the low-power subsystem and the full SoC, allowing basic applications to run on the min-SoC without booting the complete system. This segmentation extends battery life by keeping the high-power components dormant while maintaining essential functionality through the low-power subsystem.
Solution Approach 2:
The low-power subsystem is designed with multi-functionality to handle various basic applications independently, reducing the need to activate the full SoC. This universal capability of the min-SoC to execute multiple types of applications extends battery life while maintaining system versatility.
Data Source
AI summary
A system on a chip (SoC) comprises SoC memory; one or more processor subsystems, wherein each processor subsystem includes a processor connected to the SoC memory; and a low power subsystem integrated as a separate subsystem in the SoC, wherein the low power subsystem includes a microcontroller and a power management unit (PMU), wherein the microcontroller executes a real-time operating system (RTOS), wherein the PMU is connected to each processor subsystem, the PMU operating under the control of the microcontroller to control the power to each processor subsystem, wherein the low power subsystem is configured to boot up the SoC via the microcontroller executing out of SoC memory.