Information Handling System With Low-Power Processing And Shared Resources
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Solution Overview
Problem
Information handling systems face challenges in efficiently managing power consumption and resource allocation between high-power processing and low-power processing states, leading to suboptimal performance and increased energy usage.
Innovation Solution
The integration of a low-power processing system within an information handling system that shares resources with a primary processing system, utilizing a chipset with a power system to enable or disable resources based on operating states, allowing for separate operation of low-power and high-power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a single processing system is used to handle all processing tasks, then processing capabilities are maintained, but power consumption increases during low-power operation modes
Solution Approach 1:
The processing system is divided into two independent processing systems: a first processing system for high-power processing tasks and a second processing system for low-power processing tasks. Each processing system can operate independently, allowing the system to segment processing workload based on power consumption requirements, thereby reducing overall power consumption while maintaining processing capabilities when needed.
Solution Approach 2:
The chipset is designed to support both processing systems and can enable or disable resources based on operating states. The shared resources can be accessed by either processing system, making the chipset and shared resources universal components that serve multiple functions across different power states, thereby maintaining processing capabilities while enabling power-saving modes.
2Use of energy by moving object
If separate processing systems are used for high-power and low-power modes, then power consumption is reduced, but system complexity increases
Solution Approach 1:
The first and second processing systems share common resources including the chipset, memory, and other hardware components. This merging of resources reduces the overall system complexity compared to having completely separate systems, as the shared components eliminate redundancy and reduce the total number of distinct hardware elements that need to be managed.
Solution Approach 2:
The chipset acts as an intermediary component that manages communication and resource access between the two processing systems. It provides a unified interface for both processing systems to access shared resources, simplifying the interaction between the processing systems and reducing the complexity of direct connections and coordination mechanisms.
3Productivity
If all resources are always enabled, then processing capabilities are maintained, but energy consumption increases
Solution Approach 1:
The chipset includes power management capabilities that dynamically enable or disable resources based on the current operating state. When in low-power mode, the system can disable non-essential resources while maintaining core processing capabilities through the second processing system. This dynamic resource management allows the system to adapt its power consumption in real-time based on processing requirements.
Data Source
AI summary
An information handling system includes a processing system, a low-power processing system, and a chipset. The processing system is configured to operate using a power system configured to power a shared resource of the processing system and a non-shared resource of the processing system, and to disable the non-shared resource during a reduced operating state of the processing system. The low-power processing system is configured to access the shared resource of the processing system during operation of the low-power processing system, wherein the operation of the low-power processing system is separate from the operation of the processing system. The chipset includes a processor of the processing system and operable to be enabled during operation of the processing system, wherein the processor is configured to be disabled during operation of the low-power processing system.


